AU518567B2 - Microprocessor memory control - Google Patents

Microprocessor memory control

Info

Publication number
AU518567B2
AU518567B2 AU53986/79A AU5398679A AU518567B2 AU 518567 B2 AU518567 B2 AU 518567B2 AU 53986/79 A AU53986/79 A AU 53986/79A AU 5398679 A AU5398679 A AU 5398679A AU 518567 B2 AU518567 B2 AU 518567B2
Authority
AU
Australia
Prior art keywords
memory control
microprocessor memory
microprocessor
control
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU53986/79A
Other versions
AU5398679A (en
Inventor
Dale Arthur Heuer
Phillip Christian Schloss
Larry Lloyd Schroeder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Priority to AU53986/79A priority Critical patent/AU518567B2/en
Publication of AU5398679A publication Critical patent/AU5398679A/en
Application granted granted Critical
Publication of AU518567B2 publication Critical patent/AU518567B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663—Access to shared memory
AU53986/79A 1976-05-03 1979-12-18 Microprocessor memory control Ceased AU518567B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU53986/79A AU518567B2 (en) 1976-05-03 1979-12-18 Microprocessor memory control

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US682803 1976-05-03
AU53986/79A AU518567B2 (en) 1976-05-03 1979-12-18 Microprocessor memory control

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
AU24789/77A Division AU511624B2 (en) 1976-05-03 1977-05-02 Microprocessor system

Publications (2)

Publication Number Publication Date
AU5398679A AU5398679A (en) 1980-04-24
AU518567B2 true AU518567B2 (en) 1981-10-08

Family

ID=3739991

Family Applications (1)

Application Number Title Priority Date Filing Date
AU53986/79A Ceased AU518567B2 (en) 1976-05-03 1979-12-18 Microprocessor memory control

Country Status (1)

Country Link
AU (1) AU518567B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU571857B2 (en) * 1982-12-06 1988-04-28 Digital Equipment Corporation Address conversion unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU571857B2 (en) * 1982-12-06 1988-04-28 Digital Equipment Corporation Address conversion unit

Also Published As

Publication number Publication date
AU5398679A (en) 1980-04-24

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