AU4795096A - Viterbi decoding device - Google Patents

Viterbi decoding device

Info

Publication number
AU4795096A
AU4795096A AU47950/96A AU4795096A AU4795096A AU 4795096 A AU4795096 A AU 4795096A AU 47950/96 A AU47950/96 A AU 47950/96A AU 4795096 A AU4795096 A AU 4795096A AU 4795096 A AU4795096 A AU 4795096A
Authority
AU
Australia
Prior art keywords
decoding device
viterbi decoding
viterbi
decoding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU47950/96A
Inventor
Thomas Schutz
Uwe Sulzberger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent NV
Original Assignee
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel NV filed Critical Alcatel NV
Publication of AU4795096A publication Critical patent/AU4795096A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6569—Implementation on processors, e.g. DSPs, or software implementations

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
AU47950/96A 1995-03-25 1996-03-08 Viterbi decoding device Abandoned AU4795096A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP19511015 1995-03-25
DE1995111015 DE19511015A1 (en) 1995-03-25 1995-03-25 Circuit device and Viterbi decoding device equipped therewith for a message receiver

Publications (1)

Publication Number Publication Date
AU4795096A true AU4795096A (en) 1996-10-03

Family

ID=7757751

Family Applications (1)

Application Number Title Priority Date Filing Date
AU47950/96A Abandoned AU4795096A (en) 1995-03-25 1996-03-08 Viterbi decoding device

Country Status (3)

Country Link
EP (1) EP0735695A3 (en)
AU (1) AU4795096A (en)
DE (1) DE19511015A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19835252C2 (en) * 1998-08-04 2000-10-12 Alexander Dorn Method and system for transmitting data and / or control information to a receiving device
DE10032237A1 (en) * 2000-07-03 2002-01-17 Infineon Technologies Ag Viterbi equalization using pre-calculated metric increments
CN1442009A (en) 2000-07-03 2003-09-10 因芬尼昂技术股份公司 Viterbi equalizer using various hardware data path for ACS transmission metric operations

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2669445B1 (en) * 1990-11-15 1993-01-08 Alcatel Radiotelephone DEVICE FOR THE TREATMENT OF VITERBI ALGORITHM COMPRISING A PROCESSOR AND A SPECIALIZED OPERATOR.
US5220570A (en) * 1990-11-30 1993-06-15 The Board Of Trustees Of The Leland Stanford Junior University Programmable viterbi signal processor
JP2792812B2 (en) * 1993-07-02 1998-09-03 沖電気工業株式会社 Maximum likelihood sequence estimator

Also Published As

Publication number Publication date
EP0735695A3 (en) 1996-10-16
EP0735695A2 (en) 1996-10-02
DE19511015A1 (en) 1996-09-26

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