AU4479672A - Digital circuit arrangement for controlling signals toa predetermined minimum and maximum signal duration - Google Patents
Digital circuit arrangement for controlling signals toa predetermined minimum and maximum signal durationInfo
- Publication number
- AU4479672A AU4479672A AU44796/72A AU4479672A AU4479672A AU 4479672 A AU4479672 A AU 4479672A AU 44796/72 A AU44796/72 A AU 44796/72A AU 4479672 A AU4479672 A AU 4479672A AU 4479672 A AU4479672 A AU 4479672A
- Authority
- AU
- Australia
- Prior art keywords
- circuit arrangement
- digital circuit
- predetermined minimum
- maximum signal
- signal duration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
- G01R29/02—Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
- G01R29/027—Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values
- G01R29/0273—Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values the pulse characteristic being duration, i.e. width (indicating that frequency of pulses is above or below a certain limit)
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19712138405 DE2138405A1 (en) | 1971-07-31 | 1971-07-31 | DIGITAL CIRCUIT ARRANGEMENT FOR CONTROLLING SIGNALS FOR A PRE-DETERMINED MINIMUM AND MAXIMUM SIGNAL DURATION |
DEDE821384 | 1971-07-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
AU4479672A true AU4479672A (en) | 1974-01-24 |
AU463410B2 AU463410B2 (en) | 1975-07-24 |
Family
ID=5815425
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU44796/72A Expired AU463410B2 (en) | 1971-07-31 | 1972-07-20 | Digital circuit arrangement for controlling signals toa predetermined minimum and maximum signal duration |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU463410B2 (en) |
DE (1) | DE2138405A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4311986A (en) * | 1978-09-13 | 1982-01-19 | The Bendix Corporation | Single line multiplexing system for sensors and actuators |
DE2844556C3 (en) * | 1978-10-12 | 1981-08-27 | Nixdorf Computer Ag, 4790 Paderborn | Circuit arrangement for signal monitoring and interference suppression |
US4578653A (en) * | 1984-06-25 | 1986-03-25 | General Electric Company | Frequency selective filter circuit |
-
1971
- 1971-07-31 DE DE19712138405 patent/DE2138405A1/en active Pending
-
1972
- 1972-07-20 AU AU44796/72A patent/AU463410B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2138405A1 (en) | 1973-02-08 |
AU463410B2 (en) | 1975-07-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CA974608A (en) | Signal selector circuit | |
CA946946A (en) | Signal coupling circuit | |
CA1023843A (en) | Video signal control circuit | |
CA964594A (en) | Muting circuit | |
CA959134A (en) | Electronic signal amplifier | |
CA970046A (en) | Signal control circuit | |
CA1007717A (en) | Signal control circuit | |
CA996652A (en) | Electronic traffic signal control system | |
AU464427B2 (en) | A circuit for delaying a television signal | |
CA974645A (en) | Method and circuit arrangements for the digital decoding of frequency-coded signals | |
AU463410B2 (en) | Digital circuit arrangement for controlling signals toa predetermined minimum and maximum signal duration | |
CA975441A (en) | Analog signal comparator circuit | |
AU3548771A (en) | Circuit arrangement for automatic signal seeking and tuning | |
AU468858B2 (en) | Signal control circuit | |
CA938714A (en) | Burst signal gating circuit | |
CA957767A (en) | Disabling means for automatic frequency control circuit and hue control circuit | |
CA931291A (en) | Timing and control circuit for intercom telephone system | |
CA874121A (en) | Gated signal processing circuits for low-level signals | |
CA874049A (en) | Signal sampling circuits | |
CA866384A (en) | Automatic frequency control circuit | |
AU481111B2 (en) | Video signal control circuit | |
CA878723A (en) | Signal detector circuit | |
CA875676A (en) | Frequency control circuit | |
CA954759A (en) | Diaphragm logic day signal circuit | |
CA866966A (en) | Signal receiver |