AU4473100A - High resolution display controller with reduced working frequency requirement for the display data handling circuitry - Google Patents

High resolution display controller with reduced working frequency requirement for the display data handling circuitry

Info

Publication number
AU4473100A
AU4473100A AU44731/00A AU4473100A AU4473100A AU 4473100 A AU4473100 A AU 4473100A AU 44731/00 A AU44731/00 A AU 44731/00A AU 4473100 A AU4473100 A AU 4473100A AU 4473100 A AU4473100 A AU 4473100A
Authority
AU
Australia
Prior art keywords
high resolution
working frequency
data handling
reduced working
frequency requirement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU44731/00A
Inventor
Heather Bowers
Jiann-Tsuen Chen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
OPTi Inc
Original Assignee
OPTi Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by OPTi Inc filed Critical OPTi Inc
Publication of AU4473100A publication Critical patent/AU4473100A/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/005Adapting incoming signals to the display format of the display terminal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2352/00Parallel handling of streams of display data
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2044Display of intermediate tones using dithering
    • G09G3/2051Display of intermediate tones using dithering with use of a spatial dither pattern
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006Details of the interface to the display terminal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/393Arrangements for updating the contents of the bit-mapped memory
AU44731/00A 1999-04-23 2000-04-19 High resolution display controller with reduced working frequency requirement for the display data handling circuitry Abandoned AU4473100A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US29833399A 1999-04-23 1999-04-23
US09298333 1999-04-23
PCT/US2000/010587 WO2000065565A1 (en) 1999-04-23 2000-04-19 High resolution display controller with reduced working frequency requirement for the display data handling circuitry

Publications (1)

Publication Number Publication Date
AU4473100A true AU4473100A (en) 2000-11-10

Family

ID=23150051

Family Applications (1)

Application Number Title Priority Date Filing Date
AU44731/00A Abandoned AU4473100A (en) 1999-04-23 2000-04-19 High resolution display controller with reduced working frequency requirement for the display data handling circuitry

Country Status (2)

Country Link
AU (1) AU4473100A (en)
WO (1) WO2000065565A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20090054836A (en) * 2007-11-27 2009-06-01 삼성전자주식회사 The apparatus for displaying image and the method thereof
KR100973561B1 (en) * 2008-06-25 2010-08-03 삼성전자주식회사 Display appartus
CN106611593A (en) * 2015-10-22 2017-05-03 小米科技有限责任公司 Content display method and device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2243519B (en) * 1990-04-11 1994-03-23 Afe Displays Ltd Image display system
JP3118658B2 (en) * 1991-10-15 2000-12-18 キヤノン株式会社 Information processing device
JPH0713522A (en) * 1993-06-23 1995-01-17 Hitachi Ltd Matrix display control device
US5523788A (en) * 1994-09-27 1996-06-04 Eastman Kodak Company Image processor with input buffering to multiple digital signal processors
EP0718816B1 (en) * 1994-12-20 2003-08-06 Seiko Epson Corporation Image display device
US5742274A (en) * 1995-10-02 1998-04-21 Pixelvision Inc. Video interface system utilizing reduced frequency video signal processing

Also Published As

Publication number Publication date
WO2000065565A1 (en) 2000-11-02

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase