AU4305793A - Clock phase detector - Google Patents

Clock phase detector

Info

Publication number
AU4305793A
AU4305793A AU43057/93A AU4305793A AU4305793A AU 4305793 A AU4305793 A AU 4305793A AU 43057/93 A AU43057/93 A AU 43057/93A AU 4305793 A AU4305793 A AU 4305793A AU 4305793 A AU4305793 A AU 4305793A
Authority
AU
Australia
Prior art keywords
phase detector
clock phase
clock
detector
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU43057/93A
Inventor
Berthold Lankl
Georg Sebald
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of AU4305793A publication Critical patent/AU4305793A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
    • H04L7/0335—Gardner detector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AU43057/93A 1992-06-25 1993-06-03 Clock phase detector Abandoned AU4305793A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE4220876 1992-06-25
DE4220876 1992-06-25
PCT/DE1993/000476 WO1994000929A1 (en) 1992-06-25 1993-06-03 Clock phase detector

Publications (1)

Publication Number Publication Date
AU4305793A true AU4305793A (en) 1994-01-24

Family

ID=6461820

Family Applications (1)

Application Number Title Priority Date Filing Date
AU43057/93A Abandoned AU4305793A (en) 1992-06-25 1993-06-03 Clock phase detector

Country Status (7)

Country Link
EP (1) EP0647376B1 (en)
AU (1) AU4305793A (en)
BR (1) BR9306600A (en)
DE (1) DE59301018D1 (en)
MX (1) MX9303800A (en)
RU (1) RU2115252C1 (en)
WO (1) WO1994000929A1 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19947046C2 (en) * 1999-09-30 2002-05-02 Micronas Munich Gmbh Clock synchronization circuit for receiving systems
FR2820253B1 (en) * 2001-01-30 2003-05-30 Sagem METHOD FOR RECEIVING DATA SYMBOLS AND MODEM FOR IMPLEMENTING THE METHOD
AU2002257637A1 (en) * 2002-03-08 2003-09-22 Optillion Ab Device and method for recovering data
CN101719819B (en) * 2009-11-27 2013-02-27 清华大学 Parallel data free assistant clock recovery method and system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4831637A (en) * 1984-06-19 1989-05-16 American Telephone And Telegraph Company Apparatus and technique for timing jitter cancellation in a data receiver
US5115454A (en) * 1987-05-12 1992-05-19 Kucar Andy D Method and apparatus for carrier synchronization and data detection

Also Published As

Publication number Publication date
BR9306600A (en) 1998-12-08
WO1994000929A1 (en) 1994-01-06
RU2115252C1 (en) 1998-07-10
EP0647376B1 (en) 1995-11-22
DE59301018D1 (en) 1996-01-04
MX9303800A (en) 1994-01-31
EP0647376A1 (en) 1995-04-12

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