AU4270496A - Dual processor decoupling - Google Patents

Dual processor decoupling

Info

Publication number
AU4270496A
AU4270496A AU42704/96A AU4270496A AU4270496A AU 4270496 A AU4270496 A AU 4270496A AU 42704/96 A AU42704/96 A AU 42704/96A AU 4270496 A AU4270496 A AU 4270496A AU 4270496 A AU4270496 A AU 4270496A
Authority
AU
Australia
Prior art keywords
dual processor
decoupling
processor decoupling
dual
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU42704/96A
Inventor
Alasdair Rawsthorn
Ian Watson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victoria University of Manchester
Original Assignee
Victoria University of Manchester
University of Manchester
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victoria University of Manchester, University of Manchester filed Critical Victoria University of Manchester
Publication of AU4270496A publication Critical patent/AU4270496A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
AU42704/96A 1994-12-23 1995-12-21 Dual processor decoupling Abandoned AU4270496A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GBGB9426155.9A GB9426155D0 (en) 1994-12-23 1994-12-23 Dual processor decoupling
GB9426155 1994-12-23
PCT/GB1995/003001 WO1996020440A1 (en) 1994-12-23 1995-12-21 Dual processor decoupling

Publications (1)

Publication Number Publication Date
AU4270496A true AU4270496A (en) 1996-07-19

Family

ID=10766542

Family Applications (1)

Application Number Title Priority Date Filing Date
AU42704/96A Abandoned AU4270496A (en) 1994-12-23 1995-12-21 Dual processor decoupling

Country Status (3)

Country Link
AU (1) AU4270496A (en)
GB (1) GB9426155D0 (en)
WO (1) WO1996020440A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6415356B1 (en) * 2000-01-14 2002-07-02 Sun Microsystems, Inc. Method and apparatus for using an assist processor to pre-fetch data values for a primary processor
US6772321B2 (en) 2000-05-04 2004-08-03 Sun Microsystems, Inc. Method and apparatus for using an assist processor and value speculation to facilitate prefetching for a primary processor
US6681318B2 (en) 2000-09-08 2004-01-20 Sun Microsystems, Inc. Method and apparatus for using an assist processor to prefetch instructions for a primary processor
WO2002057909A2 (en) * 2001-01-16 2002-07-25 Sun Microsystems, Inc. Value speculation on an assist processor to facilitate prefetching for a primary processor
US7502910B2 (en) * 2003-01-28 2009-03-10 Sun Microsystems, Inc. Sideband scout thread processor for reducing latency associated with a main processor
CN102298507A (en) * 2010-06-24 2011-12-28 宇瞻科技股份有限公司 Storage device with virtual CD device

Also Published As

Publication number Publication date
GB9426155D0 (en) 1995-02-22
WO1996020440A1 (en) 1996-07-04

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