AU3581200A - Apparatus and method for verifying a multi-component electronic design - Google Patents

Apparatus and method for verifying a multi-component electronic design

Info

Publication number
AU3581200A
AU3581200A AU35812/00A AU3581200A AU3581200A AU 3581200 A AU3581200 A AU 3581200A AU 35812/00 A AU35812/00 A AU 35812/00A AU 3581200 A AU3581200 A AU 3581200A AU 3581200 A AU3581200 A AU 3581200A
Authority
AU
Australia
Prior art keywords
verifying
electronic design
component electronic
component
design
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU35812/00A
Inventor
Edward N. Evans
Jay V. Huggins
David Jurasek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Simutech Corp
Original Assignee
Simutech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Simutech Corp filed Critical Simutech Corp
Publication of AU3581200A publication Critical patent/AU3581200A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/331—Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
AU35812/00A 1999-01-06 2000-01-05 Apparatus and method for verifying a multi-component electronic design Abandoned AU3581200A (en)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US22854299A 1999-01-06 1999-01-06
US09228542 1999-01-06
US33628499A 1999-06-18 1999-06-18
US33644599 1999-06-18
US09336284 1999-06-18
US09336445 1999-06-18
US44317599A 1999-11-19 1999-11-19
US09443175 1999-11-19
PCT/US2000/000292 WO2000041101A1 (en) 1999-01-06 2000-01-05 Apparatus and method for verifying a multi-component electronic design

Publications (1)

Publication Number Publication Date
AU3581200A true AU3581200A (en) 2000-07-24

Family

ID=27499511

Family Applications (1)

Application Number Title Priority Date Filing Date
AU35812/00A Abandoned AU3581200A (en) 1999-01-06 2000-01-05 Apparatus and method for verifying a multi-component electronic design

Country Status (4)

Country Link
EP (1) EP1222580A1 (en)
JP (1) JP2004500609A (en)
AU (1) AU3581200A (en)
WO (1) WO2000041101A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4371856B2 (en) 2004-03-04 2009-11-25 株式会社東芝 Safety protection instrumentation system and its handling method
CN115932667B (en) * 2023-01-09 2024-01-12 广东氧迪力电气科技有限公司 Method for detecting wiring relation of electric components

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4357678A (en) * 1979-12-26 1982-11-02 International Business Machines Corporation Programmable sequential logic array mechanism
US4744084A (en) * 1986-02-27 1988-05-10 Mentor Graphics Corporation Hardware modeling system and method for simulating portions of electrical circuits
US5353243A (en) * 1989-05-31 1994-10-04 Synopsys Inc. Hardware modeling system and method of use
US5483640A (en) * 1993-02-26 1996-01-09 3Com Corporation System for managing data flow among devices by storing data and structures needed by the devices and transferring configuration information from processor to the devices
US5596742A (en) * 1993-04-02 1997-01-21 Massachusetts Institute Of Technology Virtual interconnections for reconfigurable logic systems
US5479355A (en) * 1993-09-14 1995-12-26 Hyduke; Stanley M. System and method for a closed loop operation of schematic designs with electrical hardware
US5649176A (en) * 1995-08-10 1997-07-15 Virtual Machine Works, Inc. Transition analysis and circuit resynthesis method and device for digital circuit modeling
US5794012A (en) * 1996-10-09 1998-08-11 Hewlett-Packard Company Verification of strongly ordered memory accesses in a functional model of an out-of-order computer system
US6006022A (en) * 1996-11-15 1999-12-21 Microsystem Synthesis, Inc. Cross-linked development and deployment apparatus and method
US5991529A (en) * 1997-05-16 1999-11-23 Sony Corporation Testing of hardware by using a hardware system environment that mimics a virtual system environment

Also Published As

Publication number Publication date
JP2004500609A (en) 2004-01-08
WO2000041101A1 (en) 2000-07-13
EP1222580A1 (en) 2002-07-17

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase