AU3289889A - Carry generation method and apparatus - Google Patents

Carry generation method and apparatus

Info

Publication number
AU3289889A
AU3289889A AU32898/89A AU3289889A AU3289889A AU 3289889 A AU3289889 A AU 3289889A AU 32898/89 A AU32898/89 A AU 32898/89A AU 3289889 A AU3289889 A AU 3289889A AU 3289889 A AU3289889 A AU 3289889A
Authority
AU
Australia
Prior art keywords
generation method
carry generation
carry
generation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU32898/89A
Inventor
Leonard Allen Cohn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chopp Computer Corp
Original Assignee
Chopp Computer Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chopp Computer Corp filed Critical Chopp Computer Corp
Publication of AU3289889A publication Critical patent/AU3289889A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/506—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/506—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages
    • G06F7/508—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages using carry look-ahead circuits

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
AU32898/89A 1988-02-29 1989-02-27 Carry generation method and apparatus Abandoned AU3289889A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16208188A 1988-02-29 1988-02-29
US162081 1998-09-28

Publications (1)

Publication Number Publication Date
AU3289889A true AU3289889A (en) 1989-09-22

Family

ID=22584088

Family Applications (1)

Application Number Title Priority Date Filing Date
AU32898/89A Abandoned AU3289889A (en) 1988-02-29 1989-02-27 Carry generation method and apparatus

Country Status (3)

Country Link
AU (1) AU3289889A (en)
CA (1) CA1312141C (en)
WO (1) WO1989008294A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW269074B (en) * 1994-10-14 1996-01-21 Ibm Circuit which includes cells with high fanout requirements which has a reduced RC delay

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL59907A0 (en) * 1980-04-23 1980-06-30 Nathan Grundland Arithmetic logic unit
US4623981A (en) * 1983-09-20 1986-11-18 Digital Equipment Corporation ALU with carry length detection
JPS6143341A (en) * 1984-08-07 1986-03-01 Nec Corp Adder circuit
US4737926A (en) * 1986-01-21 1988-04-12 Intel Corporation Optimally partitioned regenerative carry lookahead adder

Also Published As

Publication number Publication date
WO1989008294A1 (en) 1989-09-08
CA1312141C (en) 1992-12-29

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