AU2523599A - Synchronization of clock signals - Google Patents

Synchronization of clock signals

Info

Publication number
AU2523599A
AU2523599A AU25235/99A AU2523599A AU2523599A AU 2523599 A AU2523599 A AU 2523599A AU 25235/99 A AU25235/99 A AU 25235/99A AU 2523599 A AU2523599 A AU 2523599A AU 2523599 A AU2523599 A AU 2523599A
Authority
AU
Australia
Prior art keywords
synchronization
clock signals
clock
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU25235/99A
Inventor
Juhani Sademaa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Oyj
Original Assignee
Nokia Networks Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Networks Oy filed Critical Nokia Networks Oy
Publication of AU2523599A publication Critical patent/AU2523599A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H04L7/0012—Synchronisation information channels, e.g. clock distribution lines by comparing receiver clock with transmitter clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AU25235/99A 1998-02-13 1999-02-12 Synchronization of clock signals Abandoned AU2523599A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FI980330A FI104767B (en) 1998-02-13 1998-02-13 Synchronization of clock signals
FI980330 1998-02-13
PCT/FI1999/000116 WO1999041873A1 (en) 1998-02-13 1999-02-12 Synchronization of clock signals

Publications (1)

Publication Number Publication Date
AU2523599A true AU2523599A (en) 1999-08-30

Family

ID=8550840

Family Applications (1)

Application Number Title Priority Date Filing Date
AU25235/99A Abandoned AU2523599A (en) 1998-02-13 1999-02-12 Synchronization of clock signals

Country Status (3)

Country Link
AU (1) AU2523599A (en)
FI (1) FI104767B (en)
WO (1) WO1999041873A1 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7212653A (en) * 1972-09-19 1974-03-21
US5654988A (en) * 1995-09-29 1997-08-05 Intel Corporation Apparatus for generating a pulse clock signal for a multiple-stage synchronizer

Also Published As

Publication number Publication date
FI980330A0 (en) 1998-02-13
FI104767B (en) 2000-03-31
FI980330A (en) 1999-08-14
WO1999041873A1 (en) 1999-08-19

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase