AU2501501A - Method for producing a support element for an integrated circuit (ic) component - Google Patents
Method for producing a support element for an integrated circuit (ic) componentInfo
- Publication number
- AU2501501A AU2501501A AU25015/01A AU2501501A AU2501501A AU 2501501 A AU2501501 A AU 2501501A AU 25015/01 A AU25015/01 A AU 25015/01A AU 2501501 A AU2501501 A AU 2501501A AU 2501501 A AU2501501 A AU 2501501A
- Authority
- AU
- Australia
- Prior art keywords
- electrically conductive
- support element
- conductive layer
- coated
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07743—External electrical contacts
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Abstract
The invention relates to a method for producing a support element for an integrated circuit component which is to be included in a data carrier card. According to said method, conductor strips which have contact surfaces on both respective flat sides of the support element are etched out of a conductive layer. One side of said contact surface is connected to a respective connecting contact of the IC component and the other side serves as an external contact. The external contact surfaces and their corresponding conductor strips are coated with an additional electrically conductive protective layer. During a first step of the method, the electrically conductive layer (1) is coated with a liquid or pasty curable coating material (2) on one flat side on the contact surface points (2b) which have been provided in order to make the connecting contact. The remaining uncoated surface regions (3a, 3b, 3c) of said flat side are then coated with a liquid or pasty curable non-conductive material (3). In subsequent steps of the method, the conductor strips (7) and contact surfaces are etched out of electrically conductive layer (1) and are coated with the additional electrically conductive protective layer (5). In the final step of the method, the coating material (2) which has been applied only to one side is removed. The inventive method produces a support element which lacks the conventional support film usually used for the electrically conductive layer. This leads to a reduction in the height of the unit formed by the IC component and support element, despite a slightly thicker electrically conductive layer achieved by a corresponding material composition of the copper foil which is preferably used.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19955537 | 1999-11-18 | ||
DE19955537A DE19955537B4 (en) | 1999-11-18 | 1999-11-18 | Method for producing a carrier element for an IC module |
PCT/DE2000/003930 WO2001037621A2 (en) | 1999-11-18 | 2000-11-10 | Method for producing a support element for an integrated circuit (ic) component |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2501501A true AU2501501A (en) | 2001-05-30 |
Family
ID=7929508
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU25015/01A Abandoned AU2501501A (en) | 1999-11-18 | 2000-11-10 | Method for producing a support element for an integrated circuit (ic) component |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1230679B1 (en) |
AT (1) | ATE300099T1 (en) |
AU (1) | AU2501501A (en) |
DE (2) | DE19955537B4 (en) |
WO (1) | WO2001037621A2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008024823A1 (en) * | 2008-05-23 | 2009-12-10 | Smartrac Ip B.V. | Chip card with a plurality of components |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62139348A (en) * | 1985-12-12 | 1987-06-23 | Furukawa Electric Co Ltd:The | Lead frame for electronic part |
US5200362A (en) * | 1989-09-06 | 1993-04-06 | Motorola, Inc. | Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film |
KR100229637B1 (en) * | 1991-03-12 | 1999-11-15 | 엔다 나오또 | Method of manufacturing two-layer tab tape |
KR0152901B1 (en) * | 1993-06-23 | 1998-10-01 | 문정환 | Plastic package and method for manufacture thereof |
DE19502157B4 (en) * | 1995-01-25 | 2011-07-21 | Sagem Orga GmbH, 33106 | Carrier element for an IC module for installation in smart cards |
DE19532755C1 (en) * | 1995-09-05 | 1997-02-20 | Siemens Ag | Chip module for chip card used as telephone or identification card |
DE19536278A1 (en) * | 1995-09-28 | 1997-04-03 | Ods Gmbh & Co Kg | Carrier element for integrated circuit element of e.g. chip card |
DE19632113C1 (en) * | 1996-08-08 | 1998-02-19 | Siemens Ag | Chip card, method for producing a chip card and semiconductor chip for use in a chip card |
US5877042A (en) * | 1996-08-28 | 1999-03-02 | Motorola, Inc. | Glass/Metal package and method for producing the same |
DE19708617C2 (en) * | 1997-03-03 | 1999-02-04 | Siemens Ag | Chip card module and method for its production as well as this comprehensive chip card |
DE19745648A1 (en) * | 1997-10-15 | 1998-11-26 | Siemens Ag | Carrier element for contactless semiconductor chip-card |
-
1999
- 1999-11-18 DE DE19955537A patent/DE19955537B4/en not_active Expired - Lifetime
-
2000
- 2000-11-10 AU AU25015/01A patent/AU2501501A/en not_active Abandoned
- 2000-11-10 WO PCT/DE2000/003930 patent/WO2001037621A2/en active IP Right Grant
- 2000-11-10 DE DE50010777T patent/DE50010777D1/en not_active Expired - Fee Related
- 2000-11-10 EP EP00988572A patent/EP1230679B1/en not_active Expired - Lifetime
- 2000-11-10 AT AT00988572T patent/ATE300099T1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP1230679A2 (en) | 2002-08-14 |
DE19955537A1 (en) | 2001-05-31 |
WO2001037621A2 (en) | 2001-05-25 |
DE50010777D1 (en) | 2005-08-25 |
DE19955537B4 (en) | 2006-04-13 |
ATE300099T1 (en) | 2005-08-15 |
EP1230679B1 (en) | 2005-07-20 |
WO2001037621A3 (en) | 2002-02-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |