AU2358399A - Electronic circuit for multi-channel processing of basic functions - Google Patents

Description

P/00/01i1 Regulation 3.2

AUSTRALIA

Patents Act 1990

ORIGINAL

COMPLETE SPECIFICATION STANDARD PATENT Invention Title: Electronic circuit for multi-channel processing of basic functions The following statement is a full description of this invention, including the best method of performing it known to us: FHPSqYrCF.NNATP()320\{9M62O.2 Electronic Circuit for Multichannel Processing of Basic Functions This invention relates to an electronic circuit for providing a basic function in the area of electronic signal processing, particularly in telecommunications, such as a hands-free-talking, noise suppression, echo cancellation, or signal-filtering function, comprising at least one memory unit for temporarily storing samples.

Such electronic circuits for providing basic functions are known and commercially available in many *variations. In telecommunications, basic functions .such as hands-free talking, noise suppression, echo ft cancellation, or signal filtering, are incorporated in terminals or telecommunications systems.

Such a circuit requires at least one memory unit, generally several such units, for temporarily storing samples. Such memory units, too, are known in different forms, for example in the form of a random access memory (RAM). Known RAM units may also comprise a plurality of cells which can be written into and read from in a multiplex mode.

A disadvantage of the prior-art electronic singlechannel circuits for providing a basic function is that with such a circuit, it is possible to serve only a single communications channel at a time.

It is an object of the present invention to improve an electronic circuit of the above kind with a minimum of additional circuitry in such a way that it can provide a plurality (up to N) communications channels with the basic function simultaneously.

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According to the invention, there is provided *9e* .9 9° a memory unit for simultaneously serving up to N incoming and outgoing communications channels '*.which comprises N parallel-connected cells, and by connecting a multiplexer ahead of the memory unit and a demultiplexer after the memory unit.

In this manner, a prior-art single-channel circuit can be upgraded for multichannel operation using known electronic components which are obtainable as inexpensive mass products. It is only necessary to replace all memories present in single-channel circuits by the above-described N parallel-connected cells preceded by a multiplexer and followed by a demultiplexer.

In a preferred embodiment of the circuit according to the invention, the cells contain master-slave flipflops as basic elements for temporarily storing a binary value. Commonly stored samples generally comprise between 8 and 24 bits, mostly 16 bits.

Through the use of master-slave flip-flops for temporarily storing a binary value, simultaneous reading from and writing into the cells is made possible in a single clock cycle.

In another preferred embodiment of the circuit according to the invention, a modulo-N counter is provided which can control the cells via an address bus in such a manner that always the same cell associated with a given communications channel is addressed for the temporary storage and retrieval of samples of said particular communications channel.

Thus, at a nowadays unproblematic clock rate of e MHz, approximately 2000 communications channels can be provided with a basic function in a single, extremely compact circuit of low complexity.

The circuit according to the invention can be implemented on an application-specific integrated circuit (ASIC) chip, whose high packing density permits the physical size of the overall circuit to be kept relatively small in spite of the fact that the circuit provides a large number of communications channels with the respective basic function simultaneously. The memory units themselves can be implemented separately from the ASIC on an external random access memory chip. In this manner, the amount of chip area required for the ASIC, and thus the production costs of the ASIC, can be kept to a minimum.

A preferred method of operating an electronic multichannel circuit according to the invention is characterized in that the circuit is operated using time-division multiplexing for N communications channels at a clock rate increased N-fold as compared with a corresponding single-channel circuit.

Uses of the electronic multichannel circuit according to the invention are conceivable wherever multichannel operation is required in electronic signal processing rather than single-channel operation. To that end, the ***existing technology can be modified or replaced in the sense of the invention described above. The circuits may be constructed completely differently in each individual case, but in all cases, the combination of the features of claim 1 is implemented.

A preferred application of the electronic circuit according to the invention is in a compander for echo cancellation in telecommunications apparatus. Besides being usable for canceling acoustic echoes, such a compander circuit can also be used in hands-free facilities to suppress background noise. It is also suited for reducing line echoes, electrical echoes, and electrical noise which may be caused in communications networks when two-wire and four-wire circuits are interconnected.

Another preferred application is in Goertzel filters, which are known per se. A Goertzel filter corresponds to one or more digital resonant circuits for detecting different sine-wave tones in a composite signal. It is used, for example, in digital telephone sets to detect the dial signals transmitted by dual-tone multifrequency (DTMF) signalling. It is also used to detect the fax or modem mode by means of the commonly used 2100-Hz tone.

Another advantageous application of the circuit according to the invention is in a finite impulse response (FIR) filter. FIR filters are digital filters which temporarily store samples coming from a communications channel (with, 16 bits per sample) in a shift register. Each sample is weighted with a coefficient (usually multiplied) and fed to a summer. At the output of the summer, the filtered signal is available.

The circuit according to the invention can also be used to advantage in an infinite impulse response (IIR) filter. IIR filters are digital filters which also temporarily store running numbers of samples, with at least one combination (weighted and added samples) of samples being fed back to a preceding sample memory.

The circuit according to the invention can also be used to advantage in a vector quantization device, particularly in an analog-to-digital converter (ADC) or a digital-to-analog converter (DAC), for simultaneously processing a plurality of signals for N "channels using time-division multiplexing. Vector quantizers are circuits which search a code book for a vector which is as similar as possible to an input sequence of N samples, to an input vector of length N. This vector is then used as a representative of the input signal. For this, a similarity measure must be defined by means of which the similarity of the two vectors to be compared can be determined. All modern voice encoders for low bit rates use one or more vector quantizers. For data compression, only the code book address of a representative then needs to be determined and transmitted, not the input vector itself.

For the simultaneous generation of a plurality of signals for an N-channel system using time-division multiplexing, the electronic circuit according to the invention can also be used in a signal generator.

Such signal generators can generate specific signals commonly used for measurement purposes, system simulation, and signalling purposes fax mode, modem mode, etc.). The signal generators nowadays frequently work digitally and generate, for example, sinusoidal, triangular, sawtooth-shaped, or pulse signals or signals of a different nature, particularly .:.noise signals. For all these generator functions, to specific circuits are available which can be modified for multichannel operation in accordance with the invention.

The electronic circuit according to the invention can also be used to advantage in a code converter, particularly in a uniform PCM encoder, an A-law encoder, or a n-law encoder.

at Code converters are used to represent signals in different standards. According to the telephone standard (ITU-T G.703), for example, samples of a speech signal may be present in the form of logarithmically quantized values (also referred to as pulse code modulation, PCM) with 8 bits/sample, and in another application, they may be present in the form of uniformly quantized values with 16 bits/sample, etc.. The PCM representations commonly used in the USA and Europe for the telephone channel with 8-bit samples differ slightly with respect to the characteristic, which is why they are spoken of as "Alaw encoding" and "|j-law encoding", respectively.

There are many source-coding and channel-coding methods. The aim of source coding is to adapt the information of a source with a minimum of circuitry and a minimum of degradation to the bit rate of the transmission channel. The methods are generally quite complex. In various applications, use is made, for example, of differential PCM (DPCM) (encoding of difference values of adjacent samples), its simplest variant, delta modulation, and its complicated variant, adaptive DPCM.

More recent methods for speech coding in mobile communications (GSM) use filter models for speech synthesis to obtain a sufficient speech quality at very low bit rates 12 kb/s). The vocal chords are simulated by so-called excitation vectors, and the pharynx and mouth cavities are simulated by seriesconnected filters. Accordingly, these methods are referred to as code excited linear prediction (CELP) coding; a variant is residual excited linear predictive (RELP) coding. Channel coding aims to transmit source-coded information to the receiver error-free with a minimum of equipment. To accomplish this, error detection characters are generated from the source characters and additionally transmitted to the receiver, where they permit a reconstruction of the disturbed signals.

Another preferred application of the electronic circuit according to the invention is in a source codec, particularly in a delta modulator/demodulator, a PCM converter, a differential PCM (DPCM) converter, an adaptive differential PCM (ADPCM) converter, a GSM voice coder, a CELP coder, or an RELP coder.

The circuit according to the invention can also be used to advantage in a transform coder. Transform coders serve to transform a time-domain signal (such as speech or a scanned image) from the time domain into another domain, the so-called image domain frequency domain). The signals are commonly

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*transformed with the aid of the fast Fourier transform into the frequency domain in order to be further processed there. The transforms generally have an inverse transform, with which the processed signal can be transformed back into the time domain. Aside from the Fourier transform, there are many other transforms (Hadamard, Walsh, cosine, wavelet, etc.), which have other properties in the image domain that may be advantageous for a particular application.

A further advantageous application of the electronic circuit according to the invention is in a linear predictive coding (LPC) structure, particularly for voice digitization in mobile communications.

LPC is a term used in speech coding. For a speech segment of approximately 20 ms duration, the LPC filter coefficients are determined, which describe the instantaneous filter characteristics of the pharynx and mouth cavities.

Further advantages of the invention will become *0 apparent from the following description when taken in .o S"conjunction with the accompanying drawings. According to the invention, the aforementioned features and the features described in the following can be used alone or in arbitrary combinations. While particular embodiments of the invention are shown and described, it is to be understood that the description is made only by way of example and not as a limitation to the scope of the invention.

11 One embodiment of the invention will now be explained in more detail with reference to the accompanying drawings, in which: Fig. 1 is a functional block diagram of one embodiment of the electronic circuit accordingto the invention, used as a compander for echo cancellation; and Fig. 2 shows the basic structure of a modified memory unit in an electronic circuit according to the invention.

A compander circuit for masking line echoes which arrive at the sending subscriber in silent intervals is already known in the art for single-channel operation. On a send path x. y 2 a signal sent from a near-end subscriber to a far-end subscriber is present, of which far-end echoes reflected in the transmission system and possibly consisting of several component echoes can return over a receive path x 2 yl to the near-end subscriber. To suppress these echoes, the send signal on the send path x. y 2 is picked off and fed through an input x' 1 to an estimator module which is also fed, via a further input x' 2 with the receive signal coming from the far-end subscriber over the receive path x 2 This receive signal may be impaired by echoes.

In the estimator module, echo coupling, delays, receive levels, and background noise are calculated, and corresponding instructions are sent over a control signal path to a characteristic module which provides a corresponding characteristic to control, via a multiplier, the short-time output level zo,t(k) as a function of the short-time input level of the echo-impaired signal on the receive path x 2 y, such that the signal level is reduced during non-speech intervals of the far-end speaker and raised during speech periods in order to suppress any echoes on the useful signal during the non-speech intervals, where they could be perceived by the near-end subscriber.

The correspondingly treated output signal is passed to the near-end subscriber at an output A schematic diagram of one embodiment of the electronic multichannel circuit according to the invention in the form of a compander circuit 10 for simultaneously providing an echo-canceling function to N communications channels is shown in Fig. 1. On the send path x, y 2 a plurality of signals of channels 1 to N are present; this is shown in Fig. 1 in the box at the upper left as variation with time of the different samples of the signals of the N communications channels. These samples are fed through the input x' 1 into the compander circuit 10 using timedivision multiplexing at a clock rate increased N-fold as compared with the prior-art single-channel compander circuit. The same applies to the receive path x 2 where the samples of the receive signals from the incoming channels, shown schematically in Fig. 1 in another box at the lower right, are fed into the input at a rate N times higher than in a single-channel compander circuit.

Via the inputs and the estimator module 11 is supplied, at the N-fold clock rate, with the respective samples, from which it estimates the echo couplings and delays and forms corresponding control signals which it passes over a control line 12 to the "characteristic module 13. The latter generates the corresponding characteristics, which are fed into a multiplier 14 to control the short-time output level z of the useful signal on the kth channel as a function of the short-time input level z for the purpose of echo cancellation.

o All memory units in the modified compander circuit according to the invention are designed as multiplexer-buffer-demultiplexer (MBD) units 15, which will be explained in more detail below with reference to Fig. 2. The multichannel compander circuit further includes a modulo-N counter 16 which controls the MBD units 15 in the estimator module 11 and in the characteristic module 13 over an address bus 17 in such a way that in each of the MBD units 15, always the same memory cell assigned to a particular channel (in the example shown the kth channel) is addressed.

A typical compander characteristic with which the short-time output level Z 1 is controlled as a function of the short-time input level z i(k) is shown in Fig. 1 at the lower left. The correspondingly treated signals of the N channels are delivered at the output y' of the multichannel compander circuit 10, at a rate N times higher than in a single-channel compander circuit, to the receive path to a plurality of near-end subscribers.

0. 0 0 Fig. 2 shows schematically the structure of one of the MBD units 15 of Fig. 1, which is controlled by the modulo-N counter 16 over the address bus 17. A number N of parallel-connected memory cells 25,, 25,, equal to the number of communication channels are 0 0 provided which store one sample each 16-bit samples), the samples being transferred into the cells ,via a multiplexer 21 and read from the cells via a demultiplexer 22. The cells may contain master-slave flip-flops as basic elements for temporarily storing one binary value each.

4 *0 one binary value each.

The compander circuit 10 according to the invention can be implemented on an ASIC chip. In embodiments not shown in the drawings, the MBD units can also be implemented on an external memory chip separate from the ASIC, preferably on a RAM chip.

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