AU2021107400A4 - Ctu- power electronic inverter system - Google Patents

Abstract

CTU- POWER ELECTRONIC INVERTER SYSTEM ABSTRACT: The concerned disclosure presents a CTU-type power electronic Direct Current (DC) to Alternating Current (AC) converter system consisting of nine bidirectional unipolar power switches, powered by a single DC source which may be a battery and two auxiliary DC voltage sources that may be passive capacitive elements, are connected in a closed circuit feeding an AC load. The topology has the property of inherent capacitor voltage balancing without any complex external controller. The multilevel inverter topology is capable of producing seven levels and can boosts the input voltage levels to three times (Triple voltage gain). CTU-POWER ELECTRONIC INVERTER SYSTEM DRAWINGS: r-- - I-r - - - SiII i II I- - C1 VA~S V1 yi VDI r I2 I9 I -- -- - V.AI7 A V I FIG R 1:TeshmtcoI -ee T -netr

Description

CTU-POWER ELECTRONIC INVERTER SYSTEM DRAWINGS:

r-- - I-r - - -

SiII i II I- - C1

VA~S V1

yi VDI r I2 I9

I -- --- V.AI7 A V

I FIG R 1:TeshmtcoI -ee T -netr

EDITORIAL NOTE

2021107400

THERE ARE FIVE PAGES OF DESCRIPTION ONLY CTU- POWER ELECTRONIC INVERTER SYSTEM TECHNICAL FIELD/ FIELD OF INVENTION:

10001] This disclosure is related to an invention of an electrical power converter that converts a Direct Current (DC) power source into a variable single-phase seven level Alternating Current (AC) power source.

BACKGROUND:

10002] A power electronic converter system converts the available electrical source to a kind required by an electrical load. An inverter is generally engaged to convert the DC power source to a variable AC quantity. It is widely applied in household applications in low power range to high utility power conversion and drives. The basic structure of an inverter is always defined by a single-phase inverter and can be extended to a three phase system.

10003] To achieve a better voltage and current quality, elevated efficiency, low total harmonic distortion (THD) and low switching losses, multilevel inverters are employed. Conventionally a Flying Capacitor, Neutral Point Clamped, Cascaded H-bridge, etc. based topologies are discussed in the literature in detail to serve the purpose. These circuits require a large number of switching devices along with passive elements as the number of levels increases. These structures are classified as symmetrical structures as they employ DC sources of the same value. The DC sources can be batteries or photovoltaic sources or capacitors. In contrast to the above, asymmetrical multilevel inverters are those where sources of different values are engaged and by proper switching, a multilevel waveform with a fewer number of switching devices and passive elements is achieved. Hence, a multilevel inverter has: (a) least possible number of sources, (b) least possible number of passive components, and (c) maximum number of levels in the output voltage.

10004] This invention concerns an asymmetrical inverter with a boosted output voltage is considered where one DC-source, two capacitors, nine Insulated Gate Bipolar Transistors (IGBTs) with an antiparallel diode are employed. The converter can employ batteries or Solar PV sources in place of the capacitors. This circuit can feed the R-load or RL-load which completes the loop. With just nine switching elements, this converter is capable of generation of a 7-level output with 3 times the DC voltage source applied, which contributes to better efficiency and maintains good-quality waveforms. Furthermore, the converter is also capable of operation on three or five levels with a change in the modulation index.

SUMMARY OF THE INVENTION:

10005] As per the invention, the CTU inverter can convert an available DC supply to a controlled AC supply as required by the load. The switches are turned ON in such a manner that the voltage across the load is at a specific voltage level. Each level of operation permits a flow of current in both the directions, thereby permitting the utilization of any kind of load. The converter employs nine IGBTs with antiparallel diodes allowing the integrated (Nearest Level Control-Selective Harmonic Mitigation) NLC-SHM technique applying to the inverter. The first embodiment of this disclosure deals with the operation of the inverter and the control of the disclosure with capacitor balancing is discussed in the second embodiment.

BRIEF DESCRIPTION OF THE DRAWINGS:

10006] The advantages and features of the disclosure will be more perceptible from the following description, in combination with the drawings appended, in which:

10007] FIGURE 1 is the schematic of a 7-level CTU-Inverter.

10008] FIGURE 2 2a-2g shows all possible combinations of the circuit of FIGURE 1.

10009] FIGURE 3 Block diagram of implementation of integrated NLC-SHE control.

10010] FIGURE 4 Load voltage, load current and capacitor voltages waveforms at modulation index 1 and at constant load.

10011] FIGURE 5 Load voltage harmonic spectrums for load voltage during change of Modulation index from 1.0 to 0.8 with R-L (AC load).

10012] FIGURE 6 Load voltage and load current waveforms for variable load.

10013] FIGURE 7 Voltage harmonic spectrum at modulation index 1.

10014] FIGURE 8 Voltage harmonic spectrum at modulation index 0.8.

10015] FIGURE 9 shows the HIL results of the output voltage and current at M=1.

10016] FIGURE 10 shows the HIL results of the output voltage and current at variable load.

10017] FIGURE 11 demonstrates the application of the disclosure in solar PV application.

DETAILED DESCRIPTION:

First embodiment:

10018] The first embodiment of this disclosure describes a CTU multilevel power inverter that generates a 7-level boosted AC-voltage as output by employing a single DC-source forming the main DC link, two capacitors forming an auxiliary DC-link and considerable number of IGBTs as switches. A battery or a solar PV panel can be utilized to form the main DC-link. Similarly, the solar PV panels or batteries can be employed as sources. With the ratio between the main DC source and the capacitor voltage (voltage across

C1 or C2) being 1:1, the CTU inverter is capable to generate a 3 times boosted output voltage corresponding to the voltage magnitude at the main DC-link. The 7-level operation enhances energy efficiency as less number of switches as passive elements are employed in comparison to the conventional topologies considered in the literature. Aside, the filter of small size will be required as the load current is almost sinusoidal due to mostly inductive nature of the load.

[0019] The schematic of the disclosure is illustrated in FIGURE 1. The switches are covered under three shaded regions, numbered as Si and S2. The similarity of these regions to the English alphabets C, T and U are evident in FIGURE 1, and hence the name CTU inverter is proposed.

[0020] The primary switching element employed in this embodiment is the IGBT which intrinsically is a bipolar, unidirectional device. This device is employed as Si, S2, S3, S4, S5, S6, S7, S8 and Sq. With a diode connected antiparallel across the IGBT allows a bidirectional flow of the current and unipolar blockage of voltage. This configuration of switches is utilized as Si, S2, S3, S4, Ss, S 6, S7, S8 and S9. The switches Si and S2, S8 and Sq operate complementarily. Switches S5, S6 and S7 are utilized for charging and discharging of capacitors.

[0021] The AC-load is connected between the nodes VA and VB. Moreover, the circuit is operated with seven levels without any change in modulation technique and maintains the seven-level output at lower modulation index also. Also, with the variation in the modulation index, the circuit is capable to produce a five and a three-level output. The states are shown compiled in Table 2 and explained in FIGURE 2a to 2g.

Table 1. State table illustrates ON and OFF switches at different voltage levels and charging and discharging of capacitors under different states.

STATE TABLE

State S1 S2 S3 S4 S5 S6 S7 S8 S9 VAB Cl C2 Fig No. 3 1 1 0 0 0 1 1 0 0 1 VDC - - 2a 2 2 1 0 0 1 1 0 1 0 1 VDC Charging- 2b

3 1 0 1 1 0 0 1 0 1 1VDC - Charging 2c

4 0 0 0 0 0 0 0 0 0 0 - - 2d

5 0 1 1 1 1 0 1 1 0 -1VDC Charging - 2e 2 6 0 1 1 1 0 1 1 1 0 - VDC - - 2f 7 0 1 1 0 1 1 0 1 0 -3VDC - - 2g

[0022] In FIGURE 2, the symmetrical seven levels of the voltage waveform are shown that are possible at the output of the inverter of this disclosure. It also demonstrates the condition of the capacitors in a particular state. For instance, at FIGURE 2b, 2c, 2e and 2f both the capacitors C1 and C2 will be affected. Their charging or discharging will depend on the direction of the current flowing in the capacitor. If the current is entering the capacitor into its positive terminal, it will charge, and if it enters in its negative terminal, it will discharge. Every figure can be related Table 1.

10023] For instance, the highlighted path of FIGURE 2a highlights the active switches. Switch Si, S5, S6 and S 9 are in ON state. This state corresponds to State 1 of Table 1 (that is level +3 Vdc) in FIGURE 2. The convention of the current for this disclosure is: the current flowing from node VA to node VB at the load side will be termed as a positive current. In any state, the direction of the current may be positive or negative. So, for this state, if the current is positive it will correspond to state 1 of table 1, and the capacitors C1 and C 2 will charge. All the states are summarized in table 1.

10024] From the seven possible configurations, states 1 to 7 from table 1, and FIGURE 2a to FIGURE 2c 3 2 will generate five positive states, namely Vdc, Vdc, and lVdc can be simply analyzed under positive and 2 3 negative currents. Similarly, five negative states -lVdc, - Vdc, - Vdc can also be analyzed similarly. State 4, the zero states. This state is demonstrated in FIGURE 2d. The detailed discussion about these states will follow.

10025] As discussed above, the condition of charging and discharging depends on the flow of current. The analysis of states done in table 2 suggests that during State land 2, the direction of the current through the load will be positive; however, the in FIGURE 2b,2c,2e and 2f the capacitors will be charging. So this state can be utilized to charge or discharge the capacitors irrespective of the direction of the current. Similarly, when the current will be negative, the capacitors can be charged or discharged irrespective of the direction of the current, and the voltage level is maintained at Vdc across the C1 and C 2 .

Second embodiment:

10026] The second embodiment deals with the applied control strategy to the circuit of the disclosure with the integrated (Nearest Level Control-Selective Harmonic Mitigation) NLC-SHM technique with the consideration of voltage balancing of the capacitors. Various advantages of NLC and SHM motivated to integrate the properties of both controls and remove the drawbacks. This is done by finding the optimum switching angles at various modulation indices and interrelate the values with the rounding off values in NLC control. The transcendental equations are solved by Particle Swarm Optimization and a look-up table is created which further used to find the relation between the (Modulation Index) Ma and nearest level values. At these values, the desired harmonics are removed. Further, nearest levels corresponding to these values are calculated and new polynomial equations relating the modulation index with nearest values are found. The time of calculation can be reduced by digital logic gate implementation which leads to the simplification of the switching state.

10027] The control strategy employed to balance the capacitor voltages is shown in FIGURE 3. The control strategy for integrated NLC-SHM control. The modulation index values are fed to nearest value controller which using the polynomial function generates the y, values which are then compared with the sinusoidal reference signal. In the next stage these values are then controlled and the output is rounded off to nearest values. Positive three levels are generated by this and the negative three levels are generated in the same way taking the -y, values. Switching logic is applied according to the state table.

10028] Simulation and Hardware validation of the proposed control scheme has been done on the Typhoon Hardware-In-the-loop (HIL) technology. The DC source voltage of 100 V is taken. The load values are taken as 150 Q and 40 mH and the power frequency is 50Hz. Load voltage and the load current is monitored while varying the modulation index. The Matlab code for PSO is written for solving the SHM equations to form a lookup table for the generalization of Integrated NLC-SHM control. Simulation results of load voltage and currents are shown in Figure 4. It can be seen that the load voltage have seven distinct level and the peak voltage 300 Volts. The three time boosting capability is achieved. Capacitor voltages Vci and Vc2 are also shown and it is maintained at 100 V, which clearly proves the automatic balancing of capacitor voltages of the proposed topology. The effect of varying modulation index on the load voltage and currents by applying integrated control is seen in Figure 5. In this figure the load voltage and current waveforms when Ma is varied from 1.0 to 0.8 for RL load are shown. It is concluded from the Figure 5 that the number of voltage levels remained seven, despite of changing the modulation index, as commonly seen in other controls applicable to multilevel inverters in literature. The effect of load variation on output voltage and current is shown in Figure 6. Initially, load impedance is taken as 150ohms and 40mH and the its doubled to 300ohms 40mH.Haronic spectrums of load voltages at two different modulation indexes that is 1 and 0.8 have been shown in Figure 7 and Figure 8. The total harmonic distortion is 11.66% and 12.11%, respectively. The dynamic response of the CTU-inverter is well tested by simulations and further for real-time validation Typhoon (Hardware in loop) system is used. The effect of varying modulation index from 1 to 0.8 is shown in Figure 9. In Figure , nine level output voltage and current with varying load is shown. The real-time results are very close to simulations results and verify the operation of CTU-inverter. It is seen that the proposed control is operating satisfactorily.

APPLICATION:

10029] FIGURE 11 illustrates an application of the CTU converter discussed above in the disclosure for solar-PV application. This scheme employs three solar PV panels as sources instead of a DC source and capacitors. In FIGURE 11 the figure illustrates the application of the inverter to be integrated with the grid. Two PV arrays are connected through the MPPT controlled boost converters. The PV source 3 which is a solar panel is connected through a boost converter by replacing the DC source of the converter and produces Vd. The PV source 1 and 2 is connected across the auxiliary capacitors C1 and C 2 and through another MPPT controller. The output of the grid current and voltages are measured and fed to the controller. The controller accordingly adjusts the 9 switching pulses of the IGBTs and the control on the power factor is achieved.

Claims (2)

1. EDITORIAL NOTE

   2021107400

   THERE IS ONE PAGE OF CLAIMS ONLY

   CTU- POWER ELECTRONIC INVERTER SYSTEM

   CLAIMS:

   We claim:

   Claim 1: A 7-level inverter that comprises:

   a. 9 unipolar bidirectional power switches (IGBTs with antiparallel diode) b. 1DC-source(battery) c. 2 auxiliary DC sources(capacitors, batteries or Solar-PV fed supplies) d. 1AC-load and, the connection of the above components is demonstrated in FIGURE 1 with:

   i. 2 IGBTs with antiparallel diodes and Vdc forming an English alphabet 'C' (Sland S2), ii. 4 IGBTs forming an English alphabet 'T'(S3,S4, S5 and S6), and iii.
2. 2 IGBTs with antiparallel diodes and the AC-switch forming English alphabet 'U' (S7, S8 and S9).

   Claim 2: The claimed inverter of claim 1 is capable of producing a 7-level single-phase voltage which is a boosted output by a factor of 3.0 with respect to the main DC source Vdc.

   Claim 3: The voltage balancing strategy is capable of automatically regulating the auxiliary DC link voltage.

   Claim 4: The claimed inverter will operate at lower voltage levels of 5 and 3 levels as the modulation index reduces from 1 to 0, without a change in control strategy.

   CTU-POWER ELECTRONIC INVERTER SYSTEM

   DRAWINGS: 2021107400

   FIGURE 1: The schematic of a 7-level CTU-Inverter.

   FIGURE 2a-2g: All possible combinations of the circuit of FIGURE 1

   mSine(wt) ma >=0 γ3 + 1 T X - 0 F γ2 + 1 T X Rounding off - 0 F reference γ1 + 0 T X Rounding{} Gate Pulse calculation - -1 F Switching Off For according to -γ1 + 0 T X Logic Switches - -1 F Stage Modulation 0 Index -γ 2 + T X - -1 F 0 T -γ 3 + - X -1 F

   Nearest Voltage Level Generation

   FIGURE 3: Block diagram of implementation of integrated NLC-SHE control.

   FIGURE 4: Load voltage, load current and capacitor voltages waveforms at modulation index 1 and at constant load.

   Figure 5: Load voltage harmonic spectrums for load voltage during change of Modulation index from 1.0 to 0.8 with R-L (AC load).

   FIGURE 6: Load voltage and load current waveforms for variable load.

   FIGURE 7: Voltage harmonic spectrum at modulation index 1.

   FIGURE 8: Voltage harmonic spectrum at modulation index 0.8.

   FIGURE 9: HIL results of the output voltage and current at MI=1.

   FIGURE 10: HIL results of the output voltage and current at variable load.

   FIGURE 11: The application of the disclosure in solar PV application.