AU2007240227B2 - Timing and Ignition Circuits - Google Patents

Abstract

A relaxation oscillator circuit and a discharge lamp ignition circuit are disclosed in which a capacitor (Ct) is charged towards an unipolar voltage via a timing resistor (Rt). A reverse biased diode (D, D2) is connected in series with a negative resistance device such as a sidac (SD). This series connection shunts the capacitor (Ct) to discharge it when the rising capacitor voltage eventually forward biases the diode (D, D2). Circuits incorporating an SCR and a superimposing transformer (T) are also disclosed. Very long delays of tens of seconds or minutes can be achieved between successive pulses.

Description

AUSTRALIA Patents Act 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT ORIGINAL Name of Applicant(s): TRESTOTO PTY LIMITED Actual Inventor(s): Andrew Don MAJEWSKI Shane Peter MAJEWSKI Donat Witold MAJEWSKI Address for Service: FRASER OLD & SOHN Patent Attorneys PO Box 560 MILSONS POINT NSW 1565 Invention Title: Timing and Ignition Circuits Details of Associated Provisional Applications: 2006 906 922 Dated 13 December 2006 The following statement is a full description of this invention, including the best method of performing it known to us: TIMING AND IGNITION CIRCUITS Field of the Invention The present invention relates to electric circuits which incorporate an RC time 5 constant and, in particular, to such circuits which constitute a switch, a relaxation oscillator, or the like. Background Art It is well known that the time required to charge a capacitor through a resistor can be 10 used to control timing in electronic circuits. However, difficulty arises when the time required extends to seconds, multiples of seconds or even minutes. This is because in order to achieve these lengthy time delays, it is necessary to have relatively large resistors and relatively large capacitors. It is difficult for capacitors with both small dimensions and large capacitance, not to incorporate leakage. 15 The present invention arises out of a desire to be able to fabricate a relaxation oscillator for use with an igniter circuit for gas discharge lamps in which the period between consecutive pulses created by the relaxation oscillator type circuit is relatively large, preferably the order of 30 seconds. An advantage of such an 20 arrangement is that conventional relaxation oscillators pulse either every half cycle or every cycle of the mains supply (typically 50-60Hz) or typically several times per second so that all the components to which the igniter circuit is connected are subjected to repeated high voltage pulses which, in some instances, can shorten the operating life of the components (such as ballasts and cables). 25 Genesis of the Invention The genesis of the present invention is a desire to produce an arrangement in which relatively long time periods can be created in an electronic circuit. 30 Summary of the Invention In accordance with a first aspect of the present invention there is disclosed charging circuit for an RC time constant switch, said circuit comprising a unipolarity voltage source, a series connected timing resistor and a timing capacitor connected across said 3219C-AU voltage source, a negative resistance characteristic device and a biasing circuit therefore connected across said voltage source to bias said device sufficiently for it to conduct at least a threshold current, a diode means interconnected between the junction of said timing capacitor and timing resistor, and said device, said diode 5 means being poled to be reverse biased whilst said timing capacitor is initially charged from said voltage source via said timing resistor, and output means responsive to an increase in current through said device, whereby said capacitor reaching a predetermined state of charge forward biases said diode means and is rapidly discharged through said device to create a pulse of current therethrough to 10 which said output means responds. In accordance with a second aspect of the present invention there is disclosed an igniter circuit for a gas discharge lamp having a pair of terminals, said circuit comprising a ballast connectable in series with said lamp across an AC supply, a 15 charging circuit and a capacitor connected in series with each other and connectable in parallel with said lamp, said charging circuit including a rectifier means, a negative resistance characteristic device connected in parallel to said lamp and in series with a biasing circuit therefor, and a diode means interconnecting said capacitor and device and poled to be reverse biased as said capacitor is initially charged, whereby the 20 charging of said capacitor forward biases said diode means to discharge said capacitor through an inductive winding, to thereby create a voltage pulse across said lamp. In accordance with a third aspect of the present invention there is disclosed a method of charging a timing capacitor from a unipolar voltage source through a timing 25 resistor, said method comprising the steps of: (i) connecting a negative resistance characteristic device via a diode to shunt said capacitor, (ii) providing a bias for said device and diode to initially reverse bias said diode, and 30 (iii) allowing the increasing voltage of said charging capacitor to forward bias said diode to discharge said capacitor through said negative resistance device. 3219C-AU 2 Brief Description of the Drawings A preferred embodiment of the present invention will now be described with reference to the accompanying drawings in which: Fig. 1 is a circuit diagram of a prior art relaxation oscillator, 5 Fig. 2 is a circuit diagram of a prior art igniter circuit incorporating a relaxation oscillator, Fig. 3 is a circuit diagram of the relaxation oscillator of a first embodiment, Fig. 4 is a circuit diagram of the igniter circuit of a second embodiment, Fig. 5 is a circuit diagram of an igniter circuit of a third embodiment incorporating 10 an SCR, Fig. 6 is a circuit diagram of an igniter circuit of a fourth embodiment incorporating a superimposing transformer, and Fig. 7 is a circuit diagram of a fifth embodiment being a general purpose circuit for achieving a lengthy delay in turning on a load after closing a switch to initiate the turn 15 on action.. Detailed Description In the prior art relaxation oscillator circuit of Fig. 1, when the switch S is closed, current flows from the battery V through the timing resistor Rt to charge the timing 20 capacitor Ct. In addition, a small current flows through the sidac SD which is connected in series with an output resistor Ro. As is well known the sidac SD has a negative resistance characteristic and during the initial period of the charging almost no current flows through the sidac SD and the timing capacitor Ct therefore charges towards the battery voltage V. 25 However, as the voltage on the timing capacitor Ct increases, eventually a breakover voltage is reached at which the sidac SD begins to conduct current. Since the sidac SD has a negative resistance characteristic, the current rapidly increases causing a pulse of current through the sidac SD which discharges the charge stored in the 30 capacitor Ct. This pulse of current flowing though the sidac SD appears as a voltage pulse across the output resistor Ro. This process then repeats so that the output of the circuit is a series of pulses appearing across the output resistor Ro with a time period 3219C-AU 3 between the pulses determined by the magnitude of the timing resistor Rt and the timing capacitor Ct. The circuit of Fig. 1 is essentially used in the igniter circuit of Fig. 2. Here a high 5 pressure sodium lamp L is connected in series with a ballast B across a mains supply which is indicated by the active terminal A and the neutral terminal N. The ballast B consists of two mutually coupled windings W1 and W2 respectively, there being many more turns in winding W2 than in winding W1. A unipolarity voltage supply is formed by the series connection of the capacitor C1, resistor R1 and diode D1 in 10 parallel with the lamp L. A sidac SD is connected to the junction of the windings WI and W2 and to the junction of the capacitor Cl and resistor R1. A power factor correction capacitor PFC is provided across the active and neutral terminals in order to ensure that the current drawn by the entire circuit does not lag 15 the mains supply by more than a predetermined extent. Prior to the lamp L igniting, pulses of current flow through the ballast B into the capacitor C1, through the resistor R1 and through the diode D1, thereby progressively charging the capacitor C1. When the charge on the capacitor CI reaches a 20 predetermined magnitude, the sidac SD abruptly commences to conduct and therefore discharges the charge stored on the capacitor CI through the winding W 1. This generates a voltage pulse across the ballast B which, in addition to the mains voltage, is applied to the lamp L. 25 Normally this voltage is sufficient to enable the lamp to conduct and the lamp L then draws current through the ballast B. The voltage across the lamp L drops after ignition and the voltage across capacitor CI is then insufficient to trigger the sidac SD. 30 This circuit suffers from a number of problems one of which is that if the high voltage pulse produced by the ballast B happens to be near to, or coincide with, a zero crossing of the mains voltage, then the lamp L may well not conduct because there is no driving voltage from the mains supply. 3219C-AU 4 Turning now to Fig. 3, a relaxation oscillator circuit in accordance with a first embodiment of the present invention is illustrated. This is as in Fig. 1 save for the addition of two additional components, namely a diode D and a biasing resistor Rb. 5 As before, when the switch S is closed the timing capacitor Ct is charged via the timing resistor Rt. In addition, current flows through the biasing resistor Rb and through the sidac SD so as to ensure that a current just less than the breakover or threshold current flows through the sidac SD (or just more than the breakover current but still less than the switching current). This current naturally also flows through the 10 output resistor Ro. The small current flowing through the biasing resistor Rb means that only a small voltage drop appears across this resistor. As a consequence, the voltage at the junction of the biasing resistor Rb and the sidac SD is very much higher than the 15 voltage appearing at the junction of the timing capacitor Ct and the timing resistor Rt. As a consequence, the diode D is reverse biased and therefore functions effectively as an open circuit. As a result, no charge passing through the timing resistor Rt is leaked or otherwise not delivered to the timing capacitor Ct. Inherently very low leakage capacitors such as metallized film capacitors are able to be used for the timing 20 capacitor Ct. In addition, the current flowing through the sidac SD places that device in its negative resistance conducting region in anticipation of the following action. Eventually the voltage on the timing capacitor Ct rises sufficiently to forward bias the diode D which results in the charge on the timing capacitor Ct passing through the 25 diode D and into the sidac SD thereby reducing still further its resistance and causing a pulse of current through the output resistor Ro. Thereafter the timing capacitor Ct begins to recharge again and the diode D is again reverse biased. This procedure repeats resulting in a series of voltage pulses 30 appearing across the output resistor Ro with a timing determined by the time constant formed by the timing resistor Rt and the timing capacitor Ct. 3219C-AU 5 A significant advantage of the above arrangement is that unlike the arrangement of Fig. 1 the timing capacitor Ct is essentially charged in an open circuit state because the diode D of Fig. 3 is reverse biased. As a consequence, there is essentially no leakage of charge from the timing capacitor Ct. 5 Turning now to Fig. 4, the igniter circuit of the second embodiment is substantially the same as that of Fig. 2 save for the addition of two components namely a diode D2 and a resistor R2. The diode D2 of Fig. 4 performs the same function as the diode D of Fig. 3. The resistor R2 of Fig. 4 performs the same function as the biasing resistor 10 Rb of Fig. 3. As a consequence, in Fig. 4 a small threshold current flows through the sidac SD and through the resistor R2 and diode D1 during each positive half cycle of the mains supply. In addition, the capacitor C1 is progressively charged through the resistor RI 15 and diode D1. Initially the diode D2 is reverse biased but as the capacitor Cl continues to charge the diode D2 becomes forward biased and therefore permits the capacitor C1 to discharge though the winding Wl and the sidac SD and diode D2. This pulse of current through the winding W 1 causes a voltage pulse to appear across the ballast B which is capable of igniting the lamp. In addition, this voltage pulse 20 always appears at, or near to, a maximum voltage of the mains supply and so the igniting pulse occurs at a time when the mains supply is at its best possible position to drive current through the lamp L. A particular feature of the circuit of Fig. 4 is that should the lamp L become 25 extinguished, it is not possible for the lamp L to re-ignite until it has cooled sufficiently. This may take up to several minutes. With conventional igniter circuits the ignition pulses are being applied many times per second and thus inadvertently tend to warm the cooling lamp thereby delaying re-ignition (this applies particularly for low wattage lamps). With the arrangement of Fig. 4, the individual pulses 30 produced by the ballast B can be approximately thirty seconds apart and so there is no difficulty with repeated unsuccessful attempts to re-ignite because of the long time period between adjacent pulses. In addition, such pulses always occur at, or near, a maximum of the mains supply voltage. 3219C-AU 6 In Fig. 5 the circuit of Fig. 4 is modified in accordance with a third embodiment by the use of a silicon controlled rectifier SCR to discharge the capacitor Cl. The capacitor C1, resistor RI and diode D1 in Fig. 5 are as in Fig. 4. The sidac SD, and 5 resistor R2 are also as in Fig. 4. An optional, and preferable, resistor R3 is connected in series with the sidac SD to limit the current flowing therethrough. A diode D21 functions as diode D2 in Fig. 4 and is connected to the gate of the SCR to control its conduction. 10 As in Fig. 4, as the capacitor C1 is progressively charged until the sidac SD conducts. This current is steered into the gate of the SCR by diode D21 which causes the SCR to conduct. As a consequence, the charge stored in the capacitor C1 is discharged through the winding WIof the ballast B. As before this occurs at, or near, a maximum of the supply voltage. 15 If desired, the diode D21 can be omitted and the diode 22 used instead, however, a disadvantage of this variation is that the diode D22 must be able to conduct the full current which passes through the SCR, and not merely the gate current of the SCR (as is the case when diode D21 is used). 20 Turning now to Fig. 6, a fourth embodiment utilizing a superimposing transformer T having a primary winding W2 and a secondary winding WI, is used. The secondary winding WI is connected in series with a conventional single winding ballast B in series with the lamp L. The capacitor Cl, resistor RI and diode D1 are as before in 25 Figs.4 and 5. The sidac SD is connected in series with the primary winding W2 and, as in Fig. 4, to diode D2 and resistor R2. When the sidac SD conducts, the charged capacitor CI is discharged via the primary winding W2, sidac SD and diode D2. This pulse of current in the primary winding 30 WI is transformed by the transformer T and applied to the lamp L, again when the supply voltage is at, or near, a maximum. 3219C-AU 7 A sixth embodiment is illustrated in Fig. 7 which is similar to that of Fig. 3. The circuit of Fig. 3 is applied to the gate of an SCR. After the switch S closes, the timing capacitor Ct is initially charged via the load (which is typically a very small resistance such as a relay coil) and the much larger timing resistance Rt. When the sidac SD 5 conducts, gate current flows into the SCR to trigger same and the SCR conducts until the switch S is opened. The capacitor Ct is discharged via the SCR, thus re-setting the circuit ready for the switch S to be closed again. Lengthy delays between the initial closing of the switch S and the start of conduction of the SCR (which turns on the load current) are able to be achieved. For example, with Ct at 0.1 tF and Rt at one 10 Gigaohm, a delay of the order of 100 seconds can be achieved The foregoing describes only some embodiments of the present invention and modifications, obvious to those skilled in the electronic arts, can be made thereto without departing from the scope of the present invention. For example, the diode D 15 can be replaced by a transistor with base and collector connected together, for example, or some other such electronic device having a diode characteristic. Similarly, the sidac SD can be replaced by a diac, or an SBS (silicon bilateral switch) or SUS (silicon unilateral switch), or gas breakover tube, or similar device having a negative resistance characteristic. For example, the switching device can be a triac or 20 other thyrister. Similarly a current limiting resistor or inductor can be connected in series with capacitor C1, and/or with diode D2 or D22, and /or with sidac SD. 25 Furthermore, the basic principle of charging the capacitor in an effective open circuit condition formed by a reversed biased diode is applicable in other areas of electronics. For example a push button switch which activates a solid state switch which turns a load on immediately, and a relaxation oscillator timer which turns the solid state switch off after a substantial delay. 30 The term "comprising" (and its grammatical variations) as used herein is used in the inclusive sense of "including" or "having" and not in the exclusive sense of "consisting only of'. 3219C-AU 8 3219C-AU 9

Claims (33)

1. A charging circuit for an RC time constant switch, said circuit comprising a unipolarity voltage source, a series connected timing resistor and a timing capacitor connected across said voltage source, a negative resistance characteristic device and a biasing circuit therefore connected across said voltage source to bias said device sufficiently for it to conduct at least a threshold current, a diode means interconnected between the junction of said timing capacitor and timing resistor, and said device, said diode means being poled to be reverse biased whilst said timing capacitor is initially charged from said voltage source via said timing resistor, and output means responsive to an increase in current through said device, whereby said capacitor reaching a predetermined state of charge forward biases said diode means and is rapidly discharged through said device to create a pulse of current therethrough to which said output means responds.

2. The circuit as claimed in claim 1 wherein said negative resistance characteristic device is selected from the group consisting of a sidac, a diac, an SBS, an SUS and a gas breakover tube.

3. The circuit as claimed in claim 1 or 2 wherein said diode means comprises a diode.

4. The circuit as claimed in any one of claims 1-3 wherein said output means comprises an output resistor connected in series with said device.

5. The circuit as claimed in any one of claims 1-4 wherein said biasing circuit comprises a biasing resistor connected between said voltage source and said device.

6. The circuit as claimed in any one of claims 1-5 wherein said unipolarity voltage source comprises a D.C. source.

7. The circuit as claimed in claim 6 wherein said D.C. source comprises a battery.

8. The circuit as claimed in any one of claims 1-5 wherein said unipolarity voltage source comprises a source capacitor charged from an AC source via a rectifier means.

9. The circuit as claimed in claim 8 wherein said source capacitor is said timing capacitor. 3219C-AU -10-

10. The circuit as claimed in any one of claims 1-9 wherein output means comprises a thyrister having its gate receive said capacitor discharge.

11. An igniter circuit for a gas discharge lamp having a pair of terminals, said circuit comprising a ballast connectable in series with said lamp across an AC supply, a charging circuit and a capacitor connected in series with each other and connectable in parallel with said lamp, said charging circuit including a rectifier means, a negative resistance characteristic device connected in parallel to said lamp and in series with a biasing circuit therefor, and a diode means interconnecting said capacitor and device and poled to be reverse biased as said capacitor is initially charged, whereby the charging of said capacitor forward biases said diode means to discharge said capacitor through an inductive winding, to thereby create a voltage pulse across said lamp.

12. The circuit as claimed in claim 11 wherein said inductive winding comprises one winding two mutually coupled windings of said ballast.

13. The circuit as claimed in claim 12 wherein said ballast is a tapped inductor.

14. The circuit as claimed in claim 11 wherein a superimposing transformer has a secondary winding connected in series with said lamp and a primary winding connected in series with said device and constituting said inductive winding.

15. The circuit as claimed in any one of claims 11-14 wherein said charging circuit comprises a series connected resistor and charging diode.

16. The circuit as claimed in any one of claims 11-15 wherein said negative resistance characteristic device is selected from the group consisting of a sidac, a diac, an SBS, an SUS and a gas breakover tube.

17. The circuit as claimed in any one of claims 11-16 wherein said rectifier means comprises a diode and said charging circuit comprises a charging resistor in series with said capacitor and said diode.

18. The circuit as claimed in any one of claims 11-17 wherein said diode means comprises a diode.

19. The circuit as claimed in any one of claims 11-18 wherein said biasing circuit for said device comprises a biasing resistor connected in series with said device and connected to said charging circuit.

20. The circuit as claimed in any one of claims 11-19 wherein said inductive winding is connected in series with said device. 3219C-AU - 11 -

21. The circuit as claimed in any one of claims 11-19 wherein an SCR is connected in series with said inductive winding and has its gate connected to said device.

22. A method of charging a timing capacitor from a unipolar voltage source through a timing resistor, said method comprising the steps of: (i) connecting a negative resistance characteristic device via a diode to shunt said capacitor, (ii) providing a bias for said device and diode to initially reverse bias said diode, and (iii) allowing the increasing voltage of said charging capacitor to forward bias said diode to discharge said capacitor through said negative resistance device.

23. The method as claimed in claim 22 including the further step of: (iv) discharging said capacitor via said device.

24. the method as claimed in claim 22 including the further step of: (v) discharging said capacitor via the gate of a thyrister.

25. The method as claimed in any one of claims 22-24 including the further step of: (vi) connecting an output resistor in series with said device whereby said discharge of said capacitor appears as a voltage pulse across the output resistor.

26. The method as claimed in any one of claims 22-25 including the further step of: (vii) forming said unipolar voltage source by rectification of an AC source.

27. The method as claimed in any one of claims 17 to 19 including the further step of: (viii) shunting said capacitor discharge through a winding of a ballast inductor.

28. The said method as claimed in any one of claims 22-26 including the step of: (ix) discharging said capacitor through the primary winding of a superimposing transformer

29 A method of creating a time delay in electronics including the method as claimed in any one of claims 22-29. 3219C-AU - 12 -

30. A charging circuit for an RC time constant switch, said circuit being substantially as herein described with reference to Figs. 3 or 7 of the drawings.

31. An ignitor circuit substantially as herein described with reference to any one of Figs. 4 to 6 of the drawings.

32. A method of charging a timing capacitor, said method being substantially as herein described with reference to Figs. 3 to 7 of the drawings.

33. A method of creating a time delay in electronics, said method being substantially as herein described with reference to Figs. 3 to 7 of the drawings. Dated this 11th day of December 2007 TRESTOTO PTY LIMITED By FRASER OLD & SOHN Patent Attorneys for the Applicants 3219C-AU - 13 -