AU2006236022B2 - Detecting an envelope of an input signal - Google Patents

Description

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Patents Act 1990 COMPLETE SPECIFICATION STANDARD PATENT Applicant(s): MED-EL ELEKTROMEDIZINISCHE GERAETE GMBH Invention Title: DATA TRANSMISSION AND DECODER SYSTEM The following statement is a full description of this invention, including the best method of performing it known to me/us: DETECTING AN ENVELOPE OF AN INPUT SIGNAL o O Field of the Invention The present invention relates to detecting an envelope of an input signal, and relates particularly but not exclusively to such for use for electrostimulation of cthe acoustic nerve, typically, but not exclusively in multichannel cochlear implants.

O The present application is a divisional application of application no.

S2004201791, the whole of the subject matter therein being incorporated by reference herein.

C l 0o Background Cochlear implants (inner ear prostheses) are a means to help profoundly deaf or severely hearing impaired persons. Unlike conventional hearing aids, which just apply an amplified and modified sound signal, a cochlear implant is based on direct electrical stimulation of the acoustic nerve. The intention of a cochlear implant is to stimulate nervous structures in the inner ear electrically in such a way that hearing impressions most similar to normal hearing are obtained.

A cochlear prosthesis essentially consists of two parts, the speech processor and the implanted stimulator. The speech processor contains the power supply (batteries) of the overall system and is used to perform signal processing of the acoustic signal to extract the stimulation parameters. The stimulator (implant) generates the stimulation patterns and conducts them to the nervous tissue by means of an electrode array which usually is positioned in the scala tympani in the inner ear. The connection between the speech processor and the implanted receiver can be established by means of encoding digital information in an rf-channel involving an inductively coupled coils system.

Decoding the information within the implant can require envelope detection.

Envelope detection of an RF signal within an implant is usually performed with a simple circuit, as shown in Figure 1, composed of a rectifier diode 4, an RC-network

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1 1 and 2, and a comparator 7. A drawback to this circuit is that the total power Sconsumption of the RC-network, due in part to the ohmic resistor, can be Z considerable when taking into account the cochlear implant application.

Stimulation strategies employing high-rate pulsatile stimuli in multichannel electrode arrays have proved to be successful in giving very high levels of speech C recognition. One example therefore is the so-called "Continuous Interleaved 0 Sampling strategy as described by Wilson Finley Lawson D.T., C, Wolford Eddington Rabinowitz "Better speech recognition with Scochlear implants," Nature, vol. 352:236-238 (1991), which is incorporated herein by reference. For CIS, symmetrical biphasic current pulses are used, which are strictly non-overlapping in time. The rate per channel typically is higher than 800pulses/sec Stimulation strategies based on simultaneous activation of electrode currents so far have not shown any advantage as compared to CIS. The basic problem is the spatial channel interaction caused by conductive tissue in the scala tympani between the stimulation electrodes. If two or more stimulation current sources are activated simultaneously, and if there is no correlation between them, the currents will flow between the active electrodes and do not reach the regions of neurons which are intended to be stimulated. The problem might get less severe with new stimulation electrode designs, where the electrodes are much closer to the modiolus as compared to existing electrodes, as described by Kuzma "Evaluation of new modiolus-hugging electrode concepts in a transparent model of the cochlea," proc.

4th European Symp. on Pediatric Cochlear Implantation, 's-Hertogenbosch, The Netherlands (June 1998), which is incorporated herein by reference.

For high-rate pulsatile stimulation strategies, some patient specific parameters have to be determined. This is done some weeks after surgery in a so called "fitting"-procedure. For given phase duration of stimulation pulses and for given stimulation rate, two key parameters have to be determined for each stimulation channel: If\Pnyank&\(eepspei\P62S63 DIVDOC 15/11/06

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c 1. the minimum amplitude of biphasic current pulses necessary to Selicit a hearing sensation (Threshold Level, or THL); and Z 2. the amplitude resulting in a hearing sensation at a comfortable level (Most Comfort Level, or MCL).

For stimulation, only amplitudes between MCL and THL (for each channel) C, are used. The dynamic range between MCL and THL typically is between 6-12dB.

\0 However, the absolute positions of MCLs and THLs vary considerably between "1 patients, and differences can reach up to 40dB. To cover these absolute variations, Sthe overall dynamic range for stimulation in currently used implants typically is o0 about At the moment, MCLs and THLs are estimated during the fitting procedure by applying stimulation pulses and asking the patient about his/her subjective impression. This method usually works without problems with postlingually deaf patients. However, problems occur with prelingually or congenitally deaf patients, and in this group all ages from small children to adults are concerned. These patients are usually neither able to interpret nor to describe hearing impressions, and only rough estimations of MCLs and THLs based on behavioral methods are possible. Especially the situation of congenitally deaf small children needs to be mentioned here. An adequate acoustic input is extremely important for the infant's speech and hearing development, and this input in many cases can be provided with a properly fitted cochlear implant.

One approach for an objective measurement of MCLs and THLs is based on the measurement of the EAPs (Electrically evoked Action Potentials), as described by Gantz Brown Abbas "Intraoperative Measures of Electrically Evoked Auditory Nerve Compound Action Potentials," American Journal of Otology (2):137-144 (1994), which is incorporated herein by reference. In this approach, the overall response of the acoustic nerve to an electrical stimulus is measured very close to the position of nerve excitation. This neural response is caused by the superposition of single neural responses at the outside of the axon membranes. The If \PnyakU\Kecp\spciX62863 DIVDOC 15/11/06

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(N amplitude of the EAP at the measurement position is between 10V and 1000V.

SInformation about MCL and THL at a particular electrode position can first of all be Z expected from the so called "amplitude growth function," as described by Brown C.

Abbas P. Borland Bertschy M. "Electrically evoked whole nerve action potentials in Ineraid cochlear implant users: responses to different stimulating C electrode configurations and comparison to psychophysical responses," Journal of Speech and Hearing Research, vol. 39:453-467 (June 1996), which is incorporated (N herein by reference. This function is the relation between the amplitude of the Sstimulation pulse and the peak-to-peak voltage of the EAP. Another interesting relation is the so called "recovery function". Here, stimulation is achieved with two pulses with varying interpulse-interval. The recovery function as the relation of the amplitude of the 2nd EAP and the interpulse-interval allows one to draw conclusions about the refractory properties and particular properties concerning the time resolution of the acoustic nerve.

Summary of the Invention In accordance with one aspect of the invention there is provided a circuit for detecting the envelope of an input signal, the circuit comprising: a. a first sampling capacitor C1 and a second sampling capacitor C2, both capacitors coupled to ground; b. a first switching matrix S1 cyclically coupling C1 to: i. an input signal via a rectifier diode, the input signal being encoded with digital data, ii. a first input of a comparator, and iii. ground; c. a second switch matrix S2 cyclically coupling C2 to: i. the input signal via the rectifier diode, ii. the first input of the comparator, and iii. ground; H \Pnyanka\Keep\spec\P62863 DIV DOC 15/I 1/06

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Sd. a local oscillator coupled to S1 and S2, that controls switch Omatrices S1 and S2, the local oscillator having period T; Z e. a dc-reference coupled to a second input of the comparator; and f. a flip flop coupled to the comparator output, the flip flop being clocked by the local oscillator producing a data bit stream output indicative of the Ci input signal's envelope.

SIn accordance with another aspect of the invention, there is provided a CI method for data telemetry, the method comprising: a. encoding digital data into an input signal; b. applying the input signal via a rectifier diode to a first switch matrix S1 and a second switch matrix S2, S1 being coupled to a first sampling capacitor C1, S2 being coupled to a second sampling capacitor C2; c. applying a local oscillator signal with period T that controls S1 and S2, so as to cyclically couple C1 and C2 to: i. the input signal, ii. a first input to a comparator, and iii. ground; d. applying a DC reference voltage to the second input of the comparator; and e. sampling the output of the comparator via a flip flop clocked by the local oscillator, the flip flop outputting a data bit stream, the data bit stream representative of the input signal's envelope having encoded information.

In accordance with another aspect of the invention there is provided a circuit for measurement of electrically evoked action potentials comprising: a. a measurement electrode coupled to a first input of a differential amplifier via a first double switch; b. a reference electrode coupled to a second input of the differential amplifier via the first double switch; H:Pnynka'Xeepcpci\P62863 -DIV.DOC 15/11 /06 c. an output of the differential amplifier coupled to an input of a Ssigma-delta modulator; 0 d. an output of the the sigma-delta modulator coupled to memory; C, wherein during measurement, the electrically evoked action potential is amplified and converted to a high frequency one bit sigma-delta sequence, the sequence being C, stored in the implant's memory.

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c Brief Description of the Drawings SThe foregoing features of the invention will be more readily understood by Z reference to the following detailed description, taken with reference to the accompanying drawings, in which: Figure 1 schematically shows a standard envelope detection circuit (prior art) C Figure 2 shows a bit sequence with a self-clocking bit format 0 Figure 3 schematically shows a circuit for envelope sampling C Figure 4 shows control signals for envelope sampling SFigure 5 shows examples for correct bit-synchronization for fixed LO-rate fLo, and different bit rates fBIT a. fBIT b. fBIT fLo/3.6 c. fBIT fLO/4.4 Figure 6 shows examples of triplet sequences Figure 7 shows examples of sign-correlated simultaneous stimuli in different channels Note: all simultaneous pulses are 100% overlapping in time, and the signs of all simultaneous stimulation currents are equal a. biphasic symmetrical b. triphasic symmetrical c. triphasic-precision Figure 8 schematically shows a circuit for generation of pulses for non-simultaneous stimulation strategies (prior art) Figure 9 schematically shows a circuit for generation of sign-correlated simultaneous stimulation pulses Figure 10 EAP generation and measurement a. schematically shows a circuit b. schematically shows an equivalent electrical circuit H:PnywnkaNKeep\spe"P62863 .DIVDOC 5/i 1106 Detailed Description of Embodiments of the Invention O In a preferred embodiment the detection of an envelope of an input signal C occurs in a multi channel cochlear implant.

A cochlear implant is described which is designed to implement high rate Ssimultaneous or non-simultaneous stimulation strategies. In the case of Ssimultaneous stimulation, sign-correlated pulsatile stimuli are employed. Signi correlated means that the pulses are 100% overlapping in time and that for each

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Sphase, the signs of current flow are identical. Charge balanced biphasic and l 10 triphasic pulses can be applied.

The high data transfer rate necessary to convey sufficient stimulation information for simultaneous strategies is based on a novel data decoding concept.

Data decoding is achieved by sampling of the rf-signal by means of two sampling capacitors and subsequent digital data processing. A free running local oscillator (LO) is used, where the clock frequency is about four times higher than the bit rate.

The mismatch between the actual and nominal LO-clock frequency is digitally corrected.

The implant is equipped with an EAP measurement system. For EAP measurement, one of the intra-cochlear electrodes is addressed as sensing electrode.

The sensing electrode can also be positioned outside the cochlear to measure other bio-signals. The measurement system basically consists of an instrumentation amplifier and a subsequent sigma-delta modulator. During measurement, the EAPsignal is amplified and converted to a high-frequency one-bit sigma-delta sequence.

This sequence is stored to a memory in the implant. Random Access Memory (RAM) may be utilized. After measurement, these data are sent to outside by means of load modulation, and the EAP-signal reconstruction from the sigma-delta rough data can be achieved off-line.

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SSelf-clocking bit format with Amplitude Shift Keying O One possibility for encoding digital data in an rf-channel is to use Amplitude Shift Keying (ASK). For ASK, the rf-carrier is switched on and off controlled by the digital information sequence. Thus the information is contained in the envelope of N the rf-signal, and decoding within the implant requires envelope detection.

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SIf the bandwidth of the rf-channel is sufficiently high, a self-clocking bit format can be defined. For example, a logical "one" is encoded into the sequence "rf- Z carrier off" followed by "rf-carrier on," a logical "zero" is encoded into the reverse sequence. Assuming a duty ratio of 50%, the mean energy flow then is independent of the data content transmitted, since the time the rf-carrier is switched on is equal to Cthe time it is switched off. An example of a bit sequence employing the self-clocking IO bit format is depicted in Figure 2. The first trace shows the bit pattern, the second C(N the associated rf-sequence in self-clocking bit format, where the black squares represent "rf-on"-states. Regarding the associated envelope signal in trace 3, four different states "short low, "short high," "long low," and "long high," occur. For convenience, these states are abbreviated by L1, H1, L2, and H2, where the letter or characterizes the state "low" or "high," and the subsequent number defines the duration of the state in multiples of B/2 (bit duration States LI and H1 appear in sequences of continuing logical "zeros" or "ones," states L2 and H2 occur, if logical "zeros" and "ones" alternate.

Novel approach for envelope detection: envelope sampling As stated above, envelope detection of an RF input signal 3 within an implant is usually performed with a simple circuit, as shown in Figure 1, composed of a rectifier diode 4, an RC-network 1 and 2, and a comparator 7. In the "rf-on"-state of the ASK-signal, the voltage across the RC-network 1 and 2 is approximately equal to the amplitude of the RF input signal 3. During the "rf-off'- state, the capacitor 1 is discharged across the resistor 2. Ideally, the voltage across the capacitor 1 tracks the envelope of the RF input signal 3. To obtain steep edges of the output signal 6 a comparator 7 is involved. The two comparator input signals are the voltage across the capacitor 1, and a reference dc-voltage 5 which is typically equal to about 50% of the rf-amplitude. In the standard approach, the comparator output signal 6 is used for further signal processing.

The signal transition which necessarily occurs in the middle of each bit (cf.

Figure 1) can be exploited for clock generation within the implant. For bit decoding H \PriyankaKeep\speci\P6263 DIV DOC 15/I 1/06

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a non-retriggerable mono-flop is used, which is triggered by both the positive and Sthe negative slope of the envelope signal, when it is in its waiting position, as Z described by Zierhofer Hochmair Hochmair "Electronic design of a cochlear implant for multichannel high-rate pulsatile stimulation strategies," IEEE Trans.

Rehab. Eng., vol.3:112-116 (March 1995), which is incorporated herein by reference.

Regarding the power consumption of the RC-network, it is clear that for a Sgiven time constant T RC, resistor 2 and capacitor 1 have to be as large and as small as possible, respectively. However, for reliable operation, capacitor 1 cannot Sbe arbitrarily small. Assuming a typical lower limit C 10pF, and a time constant of T 0.1p.s results in a resistor 10kK2. If an rf-amplitude of U 5V is supposed, the current through the resistor 2 in the "rf-on" state is 500tA, resulting in a power consumption of 2.5mW. For a self clocking bit format, the mean power consumption is PR 1.25mW. Another contribution to the power consumption stems from charging/discharging of capacitor 1. Assuming C 10pF, a maximum voltage of 5V, a bit rate of fbit 600kbit/s, and supposing that the capacitor 1 is charged/ discharged once in a bit period, the resulting power is Pcharge 0.075mW.

So the total power consumption of the RC-network is about Ptot PR Pcharge 1.325mW, which is considerable in a cochlear implant application. Note that for the given parameters, Pcharge is much smaller than PR.

The envelope detection circuit proposed here, as shown in Figure 3, comprises one rectifier diode 31, two sampling capacitors 33 and 34, a comparator 39, a flip flop 311, and a local oscillator (LO) 310 within the implant (Fig.3). The LOfrequency fLO is assumed to be a multiple of the bit rate fbit (typically, fLo 4fbit). The basic idea is to sample the envelope by means of two capacitors 33 and 34 and avoid the ohmic resistor 2 of above. By means of switching matrices 35 and 36, both sampling capacitors 33 and 34 are cyclically connected to one of three ports during Phases D, C, and G, respectively, as shown in Figure 4: Phase D: connection to the output of the rectifier diode 31 (input sampling), 11:APy-k.\K -p\spccAP62863 -DIV. DOC IS/11/06

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Phase C: connection to one input of the comparator 39 (the other input is a Sreference dc-voltage 37 which is typically equal to about 50% of the rf-amplitude, as Z above), and Phase G: ground potential 38 (discharging).

The duration of phases D and G is T/2, respectively (T is one clock period of C-i the LO). To minimize the power consumption of the comparator 39, the duration of -0 phase C is T. The two sequences are offset by a phase shift of one T. At the end of phases C, the state of the comparator 39 output is clocked into a flip flop 311, i.e., Sthe active slope is the negative slope of the LO-clock signal 310.

Employing a self clocking bit format, each of the capacitors 33 and 34 is charged and discharged about once in one bit period. Thus the power consumption involved with charging/discharging of the two capacitors 33 and 34 is C,U2 C 2

U

2 Pcharge 2fbit 2 2fbit fb (C C 2

)U

2 The exact size of the capacitors 33 2 2 and 34 is of minor importance, since it is not necessary to implement a particular time constant. Charging and discharging should be sufficiently fast, and influences of charge injection should remain within acceptable limits. Therefore, capacitors which are typically employed in switched capacitor designs, such as capacitors 33 and 34 lpF, seem to be practical. Assuming such capacitors, a bit rate fbit 600kHz, and an rf-amplitude U 5V results in Pcharge 0.03mW. Supposing a LO-power consumption of typically PLO 0.25mW results in Ptot PR PLO 0.28mW, which is significantly lower than the comparable power consumption for the standard envelope detection approach.

Synchronization Limits In practical applications, the ratio between the incoming bit rate fbit and the LO rate fLo may not be exactly known. Nevertheless, correct bit synchronization should be guaranteed within defined limits. In one embodiment, the LO is completely free-running, and the synchronization is achieved fully digital. There is H1:\Pnynka\Keep\specilP62863 DIV.DOC 15/11/06

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c no frequency- or phase tracking adjustment, by means of frequency- or phase Slocked loops.

Z Employing a self clocking bit format as described above, the four different states L1, H1, L2, and H2 of the incoming data stream have to be distinguished. For the determination of theoretical synchronization limits, ideal system behavior is C assumed. In particular, if one of the sampling capacitors 33 or 34 is connected to the N0 rectifier diode 31 (Phase and the rf-carrier 32 applies only during a fraction of CI Phase D, then the capacitor is charged instantaneously and remains charged until Sdischarging-Phase G. Only if no rf-carrier 32 appears during Phase D, the capacitor o0 remains uncharged. Furthermore, it is supposed that the flip flop output 311 represents the charging state of the sampling capacitor, delayed by one LO clock period. The output results are Q 1, if the rf-carrier 32 was switched on during Phase D, and Q 0, if it remained switched off.

Table 1: Theoretical synchronization limits for input states L1, L2, H1, and H2 Input state Minimum duration Maximum duration Output code Q L1 3T/2 0 5T/2 00 L2 7T/2 000 9T/2 0000 H1 3T/2 11 5T/2 111 H2 7T/2 1111 9T/2 11111 An unambiguous association of input stages and bit patterns of the flip flop 311 output is summarized in Table 1. For example, a "short high", HI, is detected, if the output bit pattern (flip flop output Q) contains two or three ones. If the duration of H1 at the lower limit 3T/2, then the output bit pattern is Q 11, a duration at the H \Pny.kap\spec62863 DIVDOC 15/ 106

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c upper limit 5T/2 results in pattern Q 111. Any duration between these limits Syields two or three ones, dependent on the instantaneous phase shift between the LO Z clock signal 310 and the input 32. The code word with minimum length is Q 0 for an L1-state with duration 3T/2. The limits for minimum and maximum bit duration (assuming the self clocking bit format and a duty cycle of 50%) are imposed by the C- limits of the longest possible input states. For the self-clocking bit format, these ID states are the "long-" states L2 and H2. Correct bit decoding can take place for a bit C- 7 9 0 duration B within the range B or equivalently, for a bit rate fbit within 2 2 C 2 2 the range fLO fbit fLO] Assuming a fixed LO-rate of fLo 2.4MHz, the 9 7 corresponding range for the bit rate is [533bit/s fbit 685kbit/s]. For a given bit rate of fbit 600kbit/s, the corresponding range for the LO rate is [2.1MHz fo 2.7MHz].

Figure 5 depicts an example for correct bit decoding at different ratios between fro and fbit. The four traces in each of the subplots and show an example of an input bit pattern, the associated ASK-sequence of the bits in selfclocking format, the LO-clock signal 310, and the output of the flip flop 311, respectively. The LO-clock rate is equal for all subplots. For clarity, the sampling phases where rf-amplitude are present during phase D are marked with a cross. The flip flop output 311 signal exactly follows the patterns of the cross-phases, delayed by one LO-clock period. In subplot the ratio is exactly fbit Lo (nominal ratio), but a phase shift between the LO-clock signal and the ASK-sequence is introduced.

In the example shown, states H1, L1, H2, and L2 are detected as flip-flop output patterns 111, 0, 11111, and 000, respectively (cf. Table In subplots and the f f bit rates at the upper and at the lower limits, fbit f Lo and fbi, LO 3.6 4.4 respectively. As demonstrated, the output code allows an unambiguous detection of the four possible input states corresponding to Table 1, and therefore correct bit Hinymk a\Kccp\spccP62863 DIV DOC 15/11/06

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(N decoding is possible. In a practical application, the actual bit decoding is done by Smeans of subsequent logic circuitry (not shown here).

Z Special bit formats ("triplet-sequences") Some embodiments use so called "triplet-sequences", as shown in figure 6. A triplet sequence contains states where the RF-carrier is switched on (or off) for a Sduration of 3B/2, resulting in states L3 and H3, respectively. These states can N0 unambiguously be distinguished from states L1, H1, L2, and H2.

N Triplet sequences in general are composed of a. a starting short state L1 or H1; b. a sequence of strictly alternating states L3 and H3; c. terminating short state L1 or H1.

The starting and terminating short state are complementary to the neighboring states L3 or H3. Triplet sequences are abbreviated, as T010, and T010 consists of states H1 L3 H3 L3 H1. These conditions allow triplet sequences to be unambiguously detected when they are embedded into bits with self-clocking format.

Each triplet sequence is associated with a particular parity: triplet sequences starting with H1, TO, T01, TO10, etc., have even parity, triplet sequences starting L1, T1, T10, T101, etc., have odd parity.

The decoding of triplets L3 and H3 does not require additional analog hardware as compared to the decoding of states L1, H1, L2, and H2 only. However, an unambiguous detection of L3 and H3 results in a slight reduction of synchronization limits. Duration limits for L3 and H3 are summarized in Table 2 (which can be regarded as extension of Table 1).

H:\PriyanaKeep\peci\P62863 DIV DOC 15/11/06 Table 2: Theoretical synchronization limits for states L3 and H3 Input state Minimum duration Maximum duration Output code Q L3 11T/2 00000 13T/2 000000 H3 11T/2 111111 13T/2 1111111 Correct bit- and triplet decoding (assuming the self clocking bit format with a 11 13 duty cycle of 50%) requires a bit duration B within the range T B< or 3 3 3 3 equivalently, a bit rate fbit within the range fLo <fbit fLO]. Assuming a fixed 13 11 LO-rate of fLO 2.4MHz, the corresponding range for the bit rate is [554bit/s fbit 655kbit/s], and for a given bit rate of fbit 600kbit/s, the corresponding range for the LO rate is [2.2MHz fLo 2.6MHz].

Data word format for active stimulation modes based on triplet sequences Triplet sequences can very effectively be used in data transfer protocols. In the cochlear implant described herein, the transcutaneous transfer of stimulation information is achieved by means of data words, the bit rate is fbit 600kbit/s. Each data word is composed of a starting triplet sequence, a particular number of information bits (with self-clocking format), and a terminating triplet sequence.

The overall information can be divided into "static-" and "dynamic" information. Static information_comprises information concerning phase durations or reference current levels. One "static information vector" comprises 64 bits. The transfer to the implant is achieved by means of one particular bit within each data word. Static information is transmitted continuously and stored in a memory within the implant. Dynamic information comprises instantaneous electrode addresses and stimulation amplitudes.

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SThe data word format as described herein allows high rate stimulation Sstrategies based on sign-correlated, simultaneous stimulation pulses. Sign- Z correlated means that the pulses are 100% overlapping in time and that for each phase, the signs of current flow are identical.

The following active stimulation modes are possible: a. stimulation with sign-correlated biphasic, symmetrical pulses; O b. stimulation with sign-correlated triphasic, symmetrical pulses; CN and c. stimulation with sign-correlated triphasic pulses (precision mode).

Biphasic stimulation mode In the biphasic mode, stimulation is achieved by means of symmetrical, charge balanced current pulses, with equal durations of the two phases.

Data words in the biphasic stimulation mode are composed as follows: T01(or T10) ST SIGN EL_AMP 1 (optional: EL_AMP2 TO (or T1) The starting triplet sequence is either T01 or T10. The first following bit ST carries the static information. If bit ST is the first bit of the 64-bit static information vector, the starting sequence is T01, otherwise it is T10. Bit SIGN defines the sign of the first phase of the biphasic pulses: BIT means cathodic first, BIT means anodic first. Blocks EL_AMPi are composed of llbits, respectively. Each block contains four address bits (EL4 EL1) and seven amplitude bits (AMP7 AMP1): EL4 EL1 AMP7 AMP1 The number of blocks EL_AMPi defines the number of simultaneous channels. E.g., five blocks EL_AMPi with different addresses elicit five simultaneous signcorrelated pulses.

Each data word is terminated by either sequence TO, or T1, depending on the parity of preceding bits of the data word. The terminating sequence is selected to obtain odd parity of the overall data word.

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With the durations 4B and 2.5B for the starting sequence T01 (or T10) and the Sterminating sequence TO (or respectively, and the number N of simultaneous Z channels, the maximum stimulation rate R 2 for stimulation with biphasic pulses is In 600

R

2 kpulses/sec. (1) 2 8.5+11N

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Triphasic stimulation mode SIn the triphasic mode, stimulation is achieved by means of charge balanced triphasic current pulses, with equal durations of the three phases. The signs and amplitudes of the first and third phases are equal, and for the second phase, the sign is opposite, and the amplitude is twice. In the following, such pulses are designated as "triphasic symmetrical pulses".

Data words in the triphasic stimulation mode are similar to those of the biphasic mode: TO10(or T101) ST SIGN EL_AMP1 (optional: EL_AMP 2 TO(or T1) The starting triplet sequence is either T010 or T101. The first following bit ST carries the static information. If bit ST is the first bit of the 64-bit static information vector, the starting sequence is TO10, otherwise it is T101. Bit SIGN defines the sign of the first phase of the triphasic pulses: BIT means cathodic first, BIT means anodic first. Blocks ELAMPi are composed of 11bits, respectively. Each block contains four address bits (EL4 EL1) and seven amplitude bits (AMP7... AMP1): EL4 EL1 AMP7 AMP1 The number of blocks EL_AMPi defines the number of simultaneous channels. E.g., five blocks EL_AMPi with different addresses elicit five simultaneous signcorrelated pulses.

Each data word is terminated by either sequence TO, or T1, depending on the parity of preceding bits of the data word. The terminating sequence is selected to obtain odd parity of the overall data word.

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With the durations 5.5B and 2.5B for the starting sequence T010 (or T101) and Sthe terminating sequence TO (or T1), respectively, and the number N of Z simultaneous channels, the maximum stimulation rate R 3 for stimulation with triphasic pulses is 600

R

3 kpulses/sec. (2) 10+11N Triphasic stimulation precision mode In the triphasic precision mode, stimulation is achieved by means of charge Sbalanced triphasic current pulses, with equal durations of the three phases. Here, C the amplitudes of the first and second phases can be defined, and the third amplitude is the computed as the difference between the second and the first amplitude (zero net charge).

Data words in the triphasic precision mode are composed as follows: T01010 (or T10101) ST SIGN EL_AMP_AMP 1 (optional: EL_AMP_AMP2...) TO (or T1) The starting triplet sequence is either T01010, or T10101. The first following bit ST carries the static information. If bit ST is the first bit of the 64-bit static information vector, the starting sequence is T01010, otherwise it is T10101. Bit SIGN defines the sign of the first phase of the triphasic pulses: BIT means cathodic first, BIT '1' means anodic first. Blocks EL_AMP_AMPi are composed of 18 bits, respectively.

Each block contains four address bits (EL4 EL1) and seven amplitude bits (AMPA7 AMP_A1) for the first phase, and seven amplitude bits (AMP_B7 AMP_B1) for the second phase: EL4 EL1 AMP_A7 AMP_A1 AMP_B7 AMP_B1 The number of blocks EL_AMPi defines the number of simultaneous channels. E.g., five blocks EL_AMPi with different addresses elicit five simultaneous signcorrelated pulses.

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Each data word is terminated by either sequence TO, or T1, depending on the Sparity of preceding bits of the data word. The terminating sequence is selected to Z obtain odd parity of the overall data word.

With the durations 8.5B and 2.5B for the starting sequence T01010 (or T10101) and the terminating sequence TO (or T1), respectively, and the number N of simultaneous channels, the maximum stimulation rate R3,precision for stimulation with O triphasic pulses in the precision mode is

C-N

600 SR3,precision 1kpulses/sec. (3) c 13+18N In Table 3 the maximum stimulation rates according to Eqs. and are computed as a function of the number N of simultaneous channels.

H \Pnyanka\Kcep\spcci\P62863 DIV.DOC 15/1 1/06 Table 3: Maximum stimulation rates for biphasic and triphasic pulses N R2(kpulses/se R3(kpulses/se R3,precision(kpulses/s c) c) ec) 1 30.77 28.57 19.35 2 19.67 18.75 12.24 3 14.46 13.95 8.96 4 11.43 11.11 7.06 9.45 9.23 5.83 6 8.05 7.89 4.96 7 7.02 6.90 4.31 8 6.22 6.12 3.82 9 5.58 5.50 3.43 5.06 5.00 3.11 11 4.63 4.58 2.84 12 4.27 4.23 2.62 Examples of pulse shapes of possible stimulation modes are shown in Figure 7.

Format of static information vector The format of the 64-bit static information vector is shown in Table 4.

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tt-3 Table 4: Format of static information vector Data word Bit ST Description 1 ID16 Identification (16 Bit) 2 16 ID1 17 REF2 Reference current range (channel 1) (2 Bit) 18 REF1 19 REF2 Reference current range (channel 2) (2 Bit) REF1 47 REF2 Reference current range (channel 16) (2 Bit) 48 REF1 49 DUR8 Pulse duration (8 Bit) 56 DUR1 57 CRC8 CRC check (8 Bit) 64 CRC1 Each individual implant is associated with a characteristic 16-bit identification sequence, which is stored to a permanent implant memory during production.

Active stimulation is possible, if the 16 bits ID16 ID1 of the static information vector coincide with the implant specific identification sequence (however, the system can also be activated by a general, non-implant-specific 16 bit identification sequence). Bits REF2 REF1 define the reference current range for each stimulation channel. Bits DUR8 DUR1 defined the duration of the phases of biphasic and H \Pnynka\Jecp\speci\P62863 -DIV. DOC 15/11106

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triphasic pulses. Bits CRC8 CRC1 are used to implement a Cyclic-Redundancy- Check for save data transfer.

Z Modification of phase duration As stated above, the phase duration is defined by an 8-bit word in the static information vector. The default setting is that the phase duration is equal for all pulses and all channels. However, in some cases it might be useful to vary the phase O duration of single or sign-correlated stimulation pulses. In the cochlear implant described the phase duration can be enhanced by adding a sequence of logical S"ones" to the terminating triple sequence TO (or T1) of a data word. Each logical "one" enhances the phase duration by exactly 25% of its default value defined by bits DUR8 DUR1 in the static information vector. The sequence of logical "ones" is terminated by either a logical "zero" or a triplet sequence.

Examples: O 1 TO T10 0 1 00 T1 011 11 T10 101 01 T1 10 T010 0 1 10 TO 111010 T01...

In pattern the terminating sequence TO of the data word is immediately followed by starting pattern T10 (biphasic pulse), and therefore the phase duration of pulse starting immediately after TO is equal to the value defined by bits DUR8 DUR1 in the static information vector.

In pattern the terminating pattern T1 is followed by a logical "zero", and therefore the phase duration of elicited pulse again is equal to the value defined by bits DUR8 DUR1 in the static information vector.

In pattern the terminating pattern T1 is followed by a logical "one", and therefore the phase duration of elicited pulse is enhanced by 25% of the value defined by bits DUR8 DUR1 in the static information vector.

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c In patterns the terminating pattern TO is followed by a sequence of three logical o "ones", therefore the phase duration of elicited pulse is enhanced by 75% of the value Z defined by bits DUR8 DUR1 in the static information vector.

Note that for sign-correlated pulses the enhancement of the phase duration applies for all simultaneously activated stimulation pulses.

C Generation of sign-correlated simultaneous pulsatile stimuli O As stated above, the cochlear implant presented here allows to generate signc Scorrelated pulsatile stimuli in two or more simultaneously activated electrode Schannels, as shown in figure 7. The pulse waveforms are equal in time and sign_(i.e., the directions of the current flows), and the reference electrode is a remote ground electrode (monopolar stimulation). However, it should be noted that it is not required that the pulse waveforms be equal in time.

Employing sign-correlated stimuli ensures that the sum of all currents delivered by the individual current sources is always forced to flow into the reference electrode. Thus the quantity of depolarizing (negative) charge delivered to the excitable nervous tissue is well defined. This permits at least to a certain extent with regard to spatial channel interaction to generate more subtly differentiated and more sophisticated activation profiles as compared to the current standard CISstrategy, where only one profile is associated with each channel.

If sign-correlation is not ensured, the conducting tissue within the scala tympani may act as a shunt resistor between active electrodes. For example, if two neighboring electrodes sink and source a particular current simultaneously, most of the current will flow within the scala tympani from one electrode into the other, and it does not reaches the intended site of excitable nervous tissue.

The generation of non-overlapping pulses can be achieved, as depicted in Figure 8 (prior art). If a particular channel is active, the corresponding electrode Ei 88 or 89 and the remote ground electrode RG 810 are connected to the supply voltage rail VDD 81and the input of the stimulation current source 811, respectively, for the first phase of the pulse, and vice versa for the second. The advantage of such H TPriywka \Kep\sPP62863- DIV DOC 15/11/06

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a configuration is that the minimum supply voltage of the implant is only VDD,min o Vstim,max, where Vstim,max is the maximum expected voltage drop during one phase Z between the stimulation electrodes (assuming an ideal current source).

Such a switching concept is not practical in general, if two or more independent current sources are activated simultaneously. This requires that the C'1 C remote ground has to be connected to a fixed potential, to VDD/2, resulting in a NO minimum implant supply voltage of VDD,min 2 *Vstim,max. This is twice the minimum supply voltage of above and results in a significantly enhanced implant power

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Sconsumption.

However, the advantage of having only VDD,min Vstim,max and at the same time allow for simultaneous stimulation of two or more channels can be maintained, if the signs and temporal waveforms of simultaneous pulses are assumed to be equal. This allows for a concept as shown in Figure 9. Here each stimulation electrode Ei 91 or 92 is connected to two current sources 94 and 95 or 96 and 97, one for each sign, and the common remote ground electrode 93 is switched to either VDD 910 or ground potential GND 911. For stimulation, either all upper or all lower current sources are activated simultaneously, and thus the current forced to flow into electrode RG 93 is equal to the sum of absolute values of all single electrode currents.

EAP-measurement system The situation of electrical stimulation and detection of the EAPs is depicted in the simple model Figure 10(a) and in the electrical equivalent circuit Figure The system for stimulation in Figure 10(a) consists of the stimulation current source ISTIM(t) 101 (output resistor 115), switch 102, the (discrete) coupling capacitor 103 and the stimulation electrode pair, an intracochlear stimulation electrode 104 and a (remote) reference electrode 105. The system for measurementalso consists of an electrode pair, a measurement electrode 106 (which is different from the stimulation electrode 104), and a (remote) reference electrode 107 (also different H.'Pny.nka\Kep\spccP62863 DIVDOC 1I 1/06

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cfrom the stimulation reference electrode 105), double switches 110, 122, and 124, Ssampling capacitor 123, double the (discrete) coupling capacitors 108 and 109, a differential amplifier 112 (instrumentation amplifier), a sigma-delta modulator 112, and a memory 114 (RAM).

CIn the equivalent circuit Figure 10(b) the intracochlear electrodes are replaced ND by nonlinear, frequency dependent interface impedances Zs(o) 120, and ZM(C) 121, Srespectively, as described by Mayer Geddes Bourland Ogborn L., S"Faradic resistance of the electrode/electrolyte interface," Med. Biol. Eng.& Comput. (30):538-542 (1992); Ragheb Geddes "Electrical properties of metallic electrodes," Med. Biol. Eng.& Comput. (28):182-186 (1990), which is incorporated herein by reference. In a rough approximation, the tissue is replaced by a network composed of discrete RC two-ports 116-119, with RiCi Eor/y (i 1, 2, 3, and and specific conductivity y and relative dielectric constant Er. One of the two-ports 116 contains voltage source UEAP(t), representing the generated EAP. The impedances of the two reference electrodes are neglected here.

Stimulation For stimulation, a charge balanced pulse of a particular duration is delivered from the current source across the closed switch 102 and capacitor 103 into the tissue. With the cochlear implant described herein, symmetrical biphasic, symmetrical triphasic, and pulses in the triphasic precision mode can be applied.

The stimulus charges all capacitors of the system Fig.10(b), the capacitances within the interface impedances, as well as the distributed capacitances of the tissue.

The (passive) voltage response of the tissue to the stimulus is designated as "artifact". Artifact amplitudes at the input of the amplifier typically are in between 100-200mV, 2 to 3 orders of magnitude higher than the expected EAPamplitudes. After the current impulse is finished, switch 102 is switched off. This ensures that no further current can flow across the interface impedance Zs(co) 120, and hence relaxation procedures within the electrode interfaces are decoupled from H.PnymkaKcep\spei\P62I63 -DIVDOC 1/I 1/06

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N, relaxation procedures of the tissue. In order to avoid an overload condition of the Oinstrumentation amplifier, double switch 110 is switched off during the stimulus Z applies.

Generation of EAPs C- The stimulation pulse causes action potentials in a particular number of N0 neurons. If an action potential occurs, the changes from the equilibrium potential N difference at the membrane of the axon between inside and outside typically are Sabout 100mV, as described by Frijns ten Kate "A model of myelinated nerve o0 fibres for electrical prosthesis design, Med. Biol. Eng. Comput. 32(4):391-398 (1994), which is incorporated herein by reference. However, the absolute potential change at the outside typically is less than lmV, as described by Rattay "Analysis of models for external stimulation of axons," IEEE-Trans. Biomed. Eng. vol. 33, No.10:974-977 (October 1986), which is incorporated herein by reference. The superposition of absolute potential differences at the outsides of many firing neurons results in the EAP (also sometimes designated as "whole nerve action potential" or "compound action potential"). The nerves are firing with a particular delay referred to the stimulating pulse (latency), and in general the EAP appears after the stimulation pulse has finished. However, when the EAP occurs, the relaxation of the tissue usually is not finished. This means that at the input of the amplifier after the stimulus current impulse there is a fraction of voltage UEAP(t), superposed by an exponentially decreasing voltage due to the passive relaxation of the tissue. This voltage after the current stimulus is designated in the following as "residual artifact". The size of the residual artifact depends on the shape of the preceding stimulation pulse. Theoretically, triphasic pulses cause less residual artifact than biphasic pulses. If two of the three phases of a triphasic pulse can be set individually as can be done in the described cochlear implant in the triphasicprecision mode the residual artifact can be reduced to a minimum.

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SMeasurement of EAPs SIf the EAP-measurement mode is initiated (see below), double switches 110 Z and 122 are switched on (low impedance) for a duration of 1.7ms (measurement window), and double switch 124 remains open (high impedance). In this switch configuration, the input signal 106 is amplified in the instrumentation amplifier 112 C-i by a factor of 100 (fixed gain), and subsequently inputted to the sigma-delta NO modulator 113. The sigma-delta modulator 113 (1 st order) is operated as an (1 additional amplifier with programmable gain (possible gains: 5, 10, 20, and 40), and Sconverts the analog signal into a high-frequency 1-bit sequence at a rate of 1.2MHz.

The sigma-delta modulator can also be configured as an adaptive modulator with gain 5, as described by Zierhofer "Adaptive Sigma-Delta Modulation with one bit quantization," IEEE-Trans. CAS II, vol. 47, No.5:408-415 (May 2000), which is incorporated herein by reference. The sigma-delta-sequence is directly clocked into a 2048x1-bit RAM 114.

Once invoked, the measurement procedure works autonomously, and no further instructions from outside are necessary. To avoid possible disturbances during measurement due to data sequences in the rf-link, usually a continuous-wave rf-carrier is applied.

Optionally, double switch 122 can be controlled by triplet sequence T1010, which is designated as "hold-mode interrupt". If T1010 does not appear during the measurement window, double switch 122 remains in the on-state. If T1010 appears for the first time within the measurement window, double switch 122 is opened (hold-mode). The signal value which applies immediately before switch-opening is stored in sampling capacitor 123 and applies as a constant value at the input of the sigma-delta modulator 113. If T1010 is applied during the hold-mode, double switch 122 is closed for about 2.ts and thus the signal at the output of amplifier 112 is sampled and stored in sampling capacitor 123.

The hold-mode option allows a more accurate analysis of the EAP signal at one or more selected time instants within the measurement window. If the EAP- H:\Priylka\Kecp\spei\P62863 DIV DOC 15/I 1106

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Ssignal applies repetitively, an improved analysis accuracy of the overall EAP-signal Scan be obtained by proper selection of analysis time instants.

Z Although hold-mode sequence T1010 interrupts the continuous-wave rf-carrier applying in the measurement window, the disturbing influence should be negligible due to its short duration of only about 12ps.

SArtifact measurement system O The sigma-delta modulator 113 can also be used to measure the size of CN stimulus artifacts. In contrast to EAP-measurement, this system requires that a Sstimulation pulse applies. After initialization of the artifact measurement system (see below), double switches 110 and 122 are open, and double switch 124 is closed.

Thus an addressed measurement electrode 106 (after output capacitor 108) and the stimulation reference ground electrode 105 is connected to sampling capacitor 123.

At the end of the stimulation pulse, or at a time instant controlled by the hold-mode interrupt T1010 (cf. EAP-measurement system), the sampling capacitor is connected to sigma-delta-modulator 113. The voltage analyzed by the sigma-delta modulator 113 is a constant voltage. The sigma-delta data sequence is clocked into the RAM 114.

If the measurement electrode is equal to the stimulation electrode address, the artifact allows to estimate the electrode impedance. If the measurement electrode is different from the stimulation electrode, the artifact represents the voltage response to the stimulation pulse at this particular electrode position. By addressing a number of electrodes, the voltage distribution within the scala tympani as response to a stimulation pulse can be estimated.

Initialization of EAP- and artifact measurement modes The measurement mode of the cochlear implant described herein in general is invoked with the following data word: T0101 MM8 MM1 TO (or T1) Starting triplet sequence T0101 is followed by eight bits MM8 MM1, which define the settings of the measurement mode EAP- or artifact measurement mode, HAPnyanka\KecplspecAP62863 DIV DOC 1511/06

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cmeasurement electrode address, sigma-delta modulator configuration, etc.). The Sterminating sequence is either sequence TO, or T1, selected to obtain odd parity of Z the overall data word.

Read-back modes The transfer of information from the implant to outside in general is achieved C by means of load modulation. For load modulation, the quality factor of the N0 rf-receiver circuit within the implant is reduced, and this reduction is detected N outside. In the present application, digital data are transmitted by means of load Smodulation at a rate of 300kbits/sec.

Both the contents of the RAM 114, and the 64-bit static information vector can be read back. Optionally, a self clocking bit format for read-back can be selected.

The duration of the read-back of the 2048x1-RAM at 300kbit/sec is about 7ms. Thus, together with the duration of 1.7ms for the measurement window, the maximum repetition rate for EAP-measurements is more than about 100Hz.

The read-back of the digital data stored in implant-memories is initiated by particular triplet sequences (so-called interrupts). Four different interrupts are defined (Table Table Summary of read-back interrupts Logical Overall duration Function T010101 16.666ts 10B) Start read-back RAM (simple bit format) T101010 16.666us 10B) Start read-back static information vector (simple bit format) T0101010 19.166ps 11.5B) Start read-back RAM (self clocking bit format) T1010101 19.166us 11.5B) Start read-back static information vector (self clocking) The processing of the 1-bit sigma-delta sequence can comfortably be accomplished off-line, and a lot of computational power can be used for improved reconstruction of the EAP-waveforms. For example, non-linear decoding techniques can be H:\Pnyanka\Keep\speci\P62863 DIV DOC 15/I1/06

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N applied for enhanced signal-to-noise ratio, as described by Thao N.T. and Vetterli "Deterministic analysis of oversampled A/D conversion and decoding Z improvement based on consistent estimates," IEEE-Trans. Signal Proc., vol. 42, No.

3.:519-531 (March 1994), which is incorporated herein by reference.

s Although various exemplary embodiments of the invention have been Sdisclosed, it should be apparent to those skilled in the art that various changes and O modifications can be made which will achieve some of the advantages of the 1 invention without departing from the true scope of the invention. These and other

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Sobvious modifications are intended to be covered by the appended claims.

It is to be understood that, if any prior art publication is referred to herein, such reference does not constitute an admission that the publication forms a part of the common general knowledge in the art, in Australia or any other country.

In the claims which follow and in the preceding description, except where the context requires otherwise due to express language or necessary implication, the word "comprise" or variations such as "comprises" or "comprising" is used in an inclusive sense, i.e. to specify the presence of the stated features but not to preclude the presence or addition of further features in various embodiments of the invention.

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Claims (15)

1. 2. A circuit according to claim 1, for detecting the envelope of an input signal in a cochlear implant, wherein the input signal is an RF signal encoded with digital information.
2. 3. The circuit according to claim 1, wherein a first logical state is encoded by the sequence "RF-carrier off" followed by "RF-carrier on," and a second logical state is encoded by the sequence "RF-carrier on" followed by "RF-carrier off." H:\PnyankaKeepspecAP62863 DIV DOC 15/11/06 NO
3. 4. The circuit according to claim 3, wherein the RF input signal is encoded Susing Amplitude Shift Keying Modulation, the digital data employing a self- Z clocking bit format.
4. 5. The circuit according to claim 3, wherein C1 and C2 are sequentially Sand cyclically coupled via the switching matrices to: O a. the input signal via the rectifier diode, for time duration T/2 N (phase D), INO b. the comparator for time duration T (phase and c. ground for time duration T/2 (phase S2's switching sequence being offset from Si's switching sequence by a phase shift of T.
5. 6. The circuit according to claim 5, wherein the clock of the flip flop is activated at the end of phases C on the negative slope of the local oscillator.
6. 7. A method for data telemetry, the method comprising: a. encoding digital data into an input signal; b. applying the input signal via a rectifier diode to a first switch matrix S1 and a second switch matrix S2, S1 being coupled to a first sampling capacitor C1, S2 being coupled to a second sampling capacitor C2; c. applying a local oscillator signal with period T that controls S1 and S2, so as to cyclically couple C1 and C2 to: i. the input signal, ii. a first input to a comparator, and iii. ground; d. applying a DC reference voltage to the second input of the comparator; and e. sampling the output of the comparator via a flip flop clocked by HPiyaakaWKep\spci P62863 DIV.DOC 15/I 1/06 NO c the local oscillator, the flip flop outputting a data bit stream, the data bit stream Srepresentative of the input signal's envelope having encoded information.
7. 8. A method according to claim 7, for detecting the envelope of an input signal in a cochlear implant, wherein the input signal is an RF signal encoded with C- digital information. NO CI 9. A method according to claim 7, for data telemetry in a cochlear 0 implant. The method according to claim 7, wherein in the input signal, a first logical state is encoded by the sequence "RF-carrier off" followed by "RF-carrier on," and a second logical state is encoded by the sequence "RF-carrier on" followed by "RF-carrier off."
8. 11. The method according to claim 10, wherein the input signal contains special bit formats, such that the signal can be switched on or off for longer durations.
9. 12. The method according to claim 10, wherein the input signal can be switched on or off for a duration of 3B/2, B being the bit duration.
10. 13. The method according to claim 10, wherein the RF signal is encoded using Amplitude Shift Keying Modulation, the digital data employing a self- clocking bit format.
11. 14. The method according to claim 17, wherein the sampling capacitors C1 and C2 are sequentially and cyclically coupled via the switching matrices to: a. the input signal for time duration T/2 (phase D), H:\Pnyanka\Keep\spcci\P62863 DIV DOC 15/11/06 b. the 1st input of the comparator for time duration T (phase and c. to ground for time duration T/2 (phase S2's switching O sequence being offset from Si's switching sequence by a phase shift of T.
12. 15. The method according to claim 7, further comprising decoding the Sdata bit stream. N16. The method according to claim 15, wherein the decoding includes distinguishing four different data bit stream states, the data bit stream states N 10o comprising: a. a "short low" L1 defined by a data bit stream pattern of 0 or 00; b. a "short high" H1 defined by a data bit stream pattern of 11 or 111; c. a "long low" L2 defined by a data bit stream pattern of 000 or 0000; and is d. a "long high" H2 defined by a data bit stream pattern of 1111 or 11111.
13. 17. The method according to claim 16, wherein decoding the data bit stream includes distinguishing two additional bit states, the bit states comprising: a. an "extra long low" L3 defined by a data bit stream pattern of 00000 or 000000; and b. an "extra long high" H3 defined by a data bit stream pattern of 111111 or 1111111.
14. 18. The method according to claim 17, wherein decoding the bit stream includes distinguishing triplet sequences, the triplet sequences comprising: a. a starting short state L1 or H1; b. a sequence of strictly alternating states L3 or H3; c. terminating short state L1 or H1.
15. 19. The method according to claim 18, wherein the triplet sequence data Sword can be used for data control and synchronization. 0 The method according to claim 18 wherein the data word formats allow high rate stimulation strategies based on sign-correlated, simultaneous N stimulation pulses. C), N 21. The method according to claim 18, wherein data telemetry is achieved by data word formats comprising: 10 a. a starting triplet sequence; b. a particular number of information bits with self-clocking format; and c. a terminating triplet sequence. is 22. The method according to claim 21, wherein the encoded information allows the following active stimulation modes: a. stimulation with sign-correlated biphasic, symmetrical pulses; b. stimulation with sign-correlated triphasic, symmetrical pulses; and c. stimulation with sign-correlated triphasic pulses.