AU2005902026A0 - Multiple Computer Architecture with Synchronization - Google Patents

Multiple Computer Architecture with Synchronization

Info

Publication number
AU2005902026A0
AU2005902026A0 AU2005902026A AU2005902026A AU2005902026A0 AU 2005902026 A0 AU2005902026 A0 AU 2005902026A0 AU 2005902026 A AU2005902026 A AU 2005902026A AU 2005902026 A AU2005902026 A AU 2005902026A AU 2005902026 A0 AU2005902026 A0 AU 2005902026A0
Authority
AU
Australia
Prior art keywords
synchronization
computer architecture
multiple computer
architecture
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2005902026A
Inventor
John Matthew Holt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Waratek Pty Ltd
Original Assignee
Waratek Pty Ltd
Filing date
Publication date
Application filed by Waratek Pty Ltd filed Critical Waratek Pty Ltd
Publication of AU2005902026A0 publication Critical patent/AU2005902026A0/en
Priority to US11/259,744 priority Critical patent/US20060253844A1/en
Priority to US11/259,885 priority patent/US7788314B2/en
Priority to US11/259,761 priority patent/US20060265704A1/en
Priority to PCT/AU2005/001641 priority patent/WO2006110937A1/en
Priority to US11/259,634 priority patent/US20060265703A1/en
Priority to US11/259,762 priority patent/US8028299B2/en
Priority to AU2006238334A priority patent/AU2006238334A1/en
Priority to US11/912,141 priority patent/US20090055603A1/en
Priority to PCT/AU2006/000532 priority patent/WO2006110957A1/en
Priority to EP06721412A priority patent/EP1880303A4/en
Priority to US12/340,303 priority patent/US20090198776A1/en
Priority to US12/343,419 priority patent/US7818296B2/en
Priority to US12/396,446 priority patent/US7860829B2/en
Priority to US12/820,758 priority patent/US20100262590A1/en
Abandoned legal-status Critical Current

Links

AU2005902026A 2004-04-23 2005-04-21 Multiple Computer Architecture with Synchronization Abandoned AU2005902026A0 (en)

Priority Applications (14)

Application Number Priority Date Filing Date Title
US11/259,744 US20060253844A1 (en) 2005-04-21 2005-10-25 Computer architecture and method of operation for multi-computer distributed processing with initialization of objects
US11/259,885 US7788314B2 (en) 2004-04-23 2005-10-25 Multi-computer distributed processing with replicated local memory exclusive read and write and network value update propagation
US11/259,761 US20060265704A1 (en) 2005-04-21 2005-10-25 Computer architecture and method of operation for multi-computer distributed processing with synchronization
PCT/AU2005/001641 WO2006110937A1 (en) 2005-04-21 2005-10-25 Modified computer architecture with coordinated objects
US11/259,634 US20060265703A1 (en) 2005-04-21 2005-10-25 Computer architecture and method of operation for multi-computer distributed processing with replicated memory
US11/259,762 US8028299B2 (en) 2005-04-21 2005-10-25 Computer architecture and method of operation for multi-computer distributed processing with finalization of objects
EP06721412A EP1880303A4 (en) 2005-04-21 2006-04-20 Modified computer architecture for a computer to operate in a multiple computer system
AU2006238334A AU2006238334A1 (en) 2005-04-21 2006-04-20 Modified computer architecture for a computer to operate in a multiple computer system
US11/912,141 US20090055603A1 (en) 2005-04-21 2006-04-20 Modified computer architecture for a computer to operate in a multiple computer system
PCT/AU2006/000532 WO2006110957A1 (en) 2005-04-21 2006-04-20 Modified computer architecture for a computer to operate in a multiple computer system
US12/340,303 US20090198776A1 (en) 2004-04-23 2008-12-19 Computer architecture and method of operation for multi-computer distributed processing with initialization of objects
US12/343,419 US7818296B2 (en) 2005-04-21 2008-12-23 Computer architecture and method of operation for multi-computer distributed processing with synchronization
US12/396,446 US7860829B2 (en) 2004-04-23 2009-03-02 Computer architecture and method of operation for multi-computer distributed processing with replicated memory
US12/820,758 US20100262590A1 (en) 2004-04-23 2010-06-22 Multi-computer distributed processing with replicated local memory exclusive read and write and network value update propagation

Publications (1)

Publication Number Publication Date
AU2005902026A0 true AU2005902026A0 (en) 2005-05-05

Family

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