AU2003282486A8 - Method and apparatus for register file port reduction in a multithreaded processor - Google Patents

Method and apparatus for register file port reduction in a multithreaded processor

Info

Publication number
AU2003282486A8
AU2003282486A8 AU2003282486A AU2003282486A AU2003282486A8 AU 2003282486 A8 AU2003282486 A8 AU 2003282486A8 AU 2003282486 A AU2003282486 A AU 2003282486A AU 2003282486 A AU2003282486 A AU 2003282486A AU 2003282486 A8 AU2003282486 A8 AU 2003282486A8
Authority
AU
Australia
Prior art keywords
register file
multithreaded processor
file port
port reduction
reduction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003282486A
Other versions
AU2003282486A1 (en
Inventor
Mayan Moudgill
Erdem Hokenek
C John Glossner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sandbridge Technologies Inc
Original Assignee
Sandbridge Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandbridge Technologies Inc filed Critical Sandbridge Technologies Inc
Publication of AU2003282486A8 publication Critical patent/AU2003282486A8/en
Publication of AU2003282486A1 publication Critical patent/AU2003282486A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Stored Programmes (AREA)
AU2003282486A 2002-10-11 2003-10-09 Method and apparatus for register file port reduction in a multithreaded processor Abandoned AU2003282486A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/269,373 US6904511B2 (en) 2002-10-11 2002-10-11 Method and apparatus for register file port reduction in a multithreaded processor
US10/269,373 2002-10-11
PCT/US2003/031904 WO2004034209A2 (en) 2002-10-11 2003-10-09 Method and apparatus for register file port reduction in a multithreaded processor

Publications (2)

Publication Number Publication Date
AU2003282486A8 true AU2003282486A8 (en) 2004-05-04
AU2003282486A1 AU2003282486A1 (en) 2004-05-04

Family

ID=32068767

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003282486A Abandoned AU2003282486A1 (en) 2002-10-11 2003-10-09 Method and apparatus for register file port reduction in a multithreaded processor

Country Status (8)

Country Link
US (1) US6904511B2 (en)
EP (2) EP2600242A1 (en)
JP (1) JP4187720B2 (en)
KR (1) KR100988955B1 (en)
CN (1) CN100342325C (en)
AU (1) AU2003282486A1 (en)
ES (1) ES2848383T3 (en)
WO (1) WO2004034209A2 (en)

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040193846A1 (en) * 2003-03-28 2004-09-30 Sprangle Eric A. Method and apparatus for utilizing multiple opportunity ports in a processor pipeline
EP1623307B1 (en) 2003-05-09 2015-07-01 QUALCOMM Incorporated Processor reduction unit for accumulation of multiple operands with or without saturation
US7475222B2 (en) * 2004-04-07 2009-01-06 Sandbridge Technologies, Inc. Multi-threaded processor having compound instruction and operation formats
US7797363B2 (en) * 2004-04-07 2010-09-14 Sandbridge Technologies, Inc. Processor having parallel vector multiply and reduce operations with sequential semantics
US8074051B2 (en) 2004-04-07 2011-12-06 Aspen Acquisition Corporation Multithreaded processor with multiple concurrent pipelines per thread
US7890735B2 (en) * 2004-08-30 2011-02-15 Texas Instruments Incorporated Multi-threading processors, integrated circuit devices, systems, and processes of operation and manufacture
TW200625097A (en) * 2004-11-17 2006-07-16 Sandbridge Technologies Inc Data file storing multiple date types with controlled data access
US20060230253A1 (en) * 2005-04-11 2006-10-12 Lucian Codrescu Unified non-partitioned register files for a digital signal processor operating in an interleaved multi-threaded environment
US8713286B2 (en) * 2005-04-26 2014-04-29 Qualcomm Incorporated Register files for a digital signal processor operating in an interleaved multi-threaded environment
US20070223599A1 (en) * 2005-07-25 2007-09-27 Sysair, Inc., A Delaware Corporation Cellular PC modem architecture and method of operation
WO2008070250A2 (en) * 2006-09-26 2008-06-12 Sandbridge Technologies Inc. Software implementation of matrix inversion in a wireless communication system
WO2008060948A2 (en) * 2006-11-10 2008-05-22 Sandbridge Technologies, Inc. Method and system for parallelization of pipelined computations
US20080276067A1 (en) * 2007-05-01 2008-11-06 Via Technologies, Inc. Method and Apparatus for Page Table Pre-Fetching in Zero Frame Display Channel
US8677101B2 (en) * 2007-06-07 2014-03-18 International Business Machines Corporation Method and apparatus for cooperative software multitasking in a processor system with a partitioned register file
CN101681261B (en) 2007-06-20 2014-07-16 富士通株式会社 Instruction execution controller and instruction execution control method
WO2008155799A1 (en) * 2007-06-20 2008-12-24 Fujitsu Limited Instruction execution controller and instruction execution control method
US8224884B2 (en) * 2007-07-06 2012-07-17 XMOS Ltd. Processor communication tokens
US8725991B2 (en) 2007-09-12 2014-05-13 Qualcomm Incorporated Register file system and method for pipelined processing
US20100241834A1 (en) * 2007-11-05 2010-09-23 Sandbridge Technologies, Inc. Method of encoding using instruction field overloading
US8539188B2 (en) * 2008-01-30 2013-09-17 Qualcomm Incorporated Method for enabling multi-processor synchronization
CN102007469A (en) * 2008-02-18 2011-04-06 阿斯奔收购公司 Method to accelerate null-terminated string operations
WO2009114691A2 (en) * 2008-03-13 2009-09-17 Sandbridge Technologies, Inc. Method for achieving power savings by disabling a valid array
EP2324430A4 (en) 2008-08-06 2012-07-25 Aspen Acquisition Corp Haltable and restartable dma engine
US9207995B2 (en) 2010-11-03 2015-12-08 International Business Machines Corporation Mechanism to speed-up multithreaded execution by register file write port reallocation
JP5283739B2 (en) * 2011-09-27 2013-09-04 インテル・コーポレーション Multi-thread communication within the processor
US9323528B2 (en) * 2012-12-20 2016-04-26 Intel Corporation Method, apparatus, system creating, executing and terminating mini-threads
GB2501791B (en) * 2013-01-24 2014-06-11 Imagination Tech Ltd Register file having a plurality of sub-register files
US9508112B2 (en) * 2013-07-31 2016-11-29 Apple Inc. Multi-threaded GPU pipeline
US9390033B2 (en) 2013-11-13 2016-07-12 Sandisk Technologies Llc Method and system for communicating with non-volatile memory via multiple data paths
US9430411B2 (en) 2013-11-13 2016-08-30 Sandisk Technologies Llc Method and system for communicating with non-volatile memory
US9377968B2 (en) 2013-11-13 2016-06-28 Sandisk Technologies Llc Method and system for using templates to communicate with non-volatile memory
GB2520731B (en) * 2013-11-29 2017-02-08 Imagination Tech Ltd Soft-partitioning of a register file cache
US9921848B2 (en) * 2014-03-27 2018-03-20 International Business Machines Corporation Address expansion and contraction in a multithreading computer system
US9594660B2 (en) 2014-03-27 2017-03-14 International Business Machines Corporation Multithreading computer system and program product for executing a query instruction for idle time accumulation among cores
US10102004B2 (en) 2014-03-27 2018-10-16 International Business Machines Corporation Hardware counters to track utilization in a multithreading computer system
US9804846B2 (en) 2014-03-27 2017-10-31 International Business Machines Corporation Thread context preservation in a multithreading computer system
WO2015155894A1 (en) * 2014-04-11 2015-10-15 株式会社Ｍｕｒａｋｕｍｏ Processor and method
US10514911B2 (en) 2014-11-26 2019-12-24 International Business Machines Corporation Structure for microprocessor including arithmetic logic units and an efficiency logic unit
US11544214B2 (en) * 2015-02-02 2023-01-03 Optimum Semiconductor Technologies, Inc. Monolithic vector processor configured to operate on variable length vectors using a vector length register
CN115100018A (en) * 2015-06-10 2022-09-23 无比视视觉技术有限公司 Image processor and method for processing image
US10338920B2 (en) 2015-12-18 2019-07-02 Intel Corporation Instructions and logic for get-multiple-vector-elements operations
US20170177351A1 (en) * 2015-12-18 2017-06-22 Intel Corporation Instructions and Logic for Even and Odd Vector Get Operations
CN114489792B (en) * 2021-03-25 2022-10-11 沐曦集成电路(上海)有限公司 Processor device and instruction execution method thereof

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5226131A (en) * 1989-12-27 1993-07-06 The United States Of America As Represented By The United States Department Of Energy Sequencing and fan-out mechanism for causing a set of at least two sequential instructions to be performed in a dataflow processing computer
US5404469A (en) * 1992-02-25 1995-04-04 Industrial Technology Research Institute Multi-threaded microprocessor architecture utilizing static interleaving
US5682491A (en) 1994-12-29 1997-10-28 International Business Machines Corporation Selective processing and routing of results among processors controlled by decoding instructions using mask value derived from instruction tag and processor identifier
US6128720A (en) 1994-12-29 2000-10-03 International Business Machines Corporation Distributed processing array with component processors performing customized interpretation of instructions
US5649135A (en) 1995-01-17 1997-07-15 International Business Machines Corporation Parallel processing system and method using surrogate instructions
US5659785A (en) 1995-02-10 1997-08-19 International Business Machines Corporation Array processor communication architecture with broadcast processor instructions
US6038643A (en) * 1996-01-24 2000-03-14 Sun Microsystems, Inc. Stack management unit and method for a processor having a stack
US5778243A (en) * 1996-07-03 1998-07-07 International Business Machines Corporation Multi-threaded cell for a memory
US6073159A (en) * 1996-12-31 2000-06-06 Compaq Computer Corporation Thread properties attribute vector based thread selection in multithreading processor
US6128641A (en) * 1997-09-12 2000-10-03 Siemens Aktiengesellschaft Data processing unit with hardware assisted context switching capability
US6079010A (en) 1998-03-31 2000-06-20 Lucent Technologies Inc. Multiple machine view execution in a computer system
US6317821B1 (en) 1998-05-18 2001-11-13 Lucent Technologies Inc. Virtual single-cycle execution in pipelined processors
US6209066B1 (en) * 1998-06-30 2001-03-27 Sun Microsystems, Inc. Method and apparatus for memory allocation in a multi-threaded virtual machine
US6260189B1 (en) 1998-09-14 2001-07-10 Lucent Technologies Inc. Compiler-controlled dynamic instruction dispatch in pipelined processors
US6256725B1 (en) 1998-12-04 2001-07-03 Agere Systems Guardian Corp. Shared datapath processor utilizing stack-based and register-based storage spaces
US6282585B1 (en) 1999-03-22 2001-08-28 Agere Systems Guardian Corp. Cooperative interconnection for reducing port pressure in clustered microprocessors
US6269437B1 (en) 1999-03-22 2001-07-31 Agere Systems Guardian Corp. Duplicator interconnection methods and apparatus for reducing port pressure in a clustered processor
US6230251B1 (en) 1999-03-22 2001-05-08 Agere Systems Guardian Corp. File replication methods and apparatus for reducing port pressure in a clustered processor
US6341347B1 (en) * 1999-05-11 2002-01-22 Sun Microsystems, Inc. Thread switch logic in a multiple-thread processor
US6542991B1 (en) * 1999-05-11 2003-04-01 Sun Microsystems, Inc. Multiple-thread processor with single-thread interface shared among threads
US6643747B2 (en) * 2000-12-27 2003-11-04 Intel Corporation Processing requests to efficiently access a limited bandwidth storage area
US20020103990A1 (en) * 2001-02-01 2002-08-01 Hanan Potash Programmed load precession machine
US7487505B2 (en) * 2001-08-27 2009-02-03 Intel Corporation Multithreaded microprocessor with register allocation based on number of active threads

Also Published As

Publication number Publication date
WO2004034209A2 (en) 2004-04-22
CN100342325C (en) 2007-10-10
ES2848383T3 (en) 2021-08-09
EP1550030A2 (en) 2005-07-06
US6904511B2 (en) 2005-06-07
JP4187720B2 (en) 2008-11-26
KR100988955B1 (en) 2010-10-20
KR20050054998A (en) 2005-06-10
US20040073779A1 (en) 2004-04-15
WO2004034209A3 (en) 2004-09-02
AU2003282486A1 (en) 2004-05-04
CN1708745A (en) 2005-12-14
EP1550030B1 (en) 2020-11-18
JP2006502504A (en) 2006-01-19
EP1550030A4 (en) 2008-03-05
EP2600242A1 (en) 2013-06-05

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase