AU2003274453A1 - System and method for functional verification of an electronic integrated circuit design - Google Patents
System and method for functional verification of an electronic integrated circuit designInfo
- Publication number
- AU2003274453A1 AU2003274453A1 AU2003274453A AU2003274453A AU2003274453A1 AU 2003274453 A1 AU2003274453 A1 AU 2003274453A1 AU 2003274453 A AU2003274453 A AU 2003274453A AU 2003274453 A AU2003274453 A AU 2003274453A AU 2003274453 A1 AU2003274453 A1 AU 2003274453A1
- Authority
- AU
- Australia
- Prior art keywords
- integrated circuit
- circuit design
- electronic integrated
- functional verification
- verification
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/IB2003/004762 WO2005041074A1 (en) | 2003-10-28 | 2003-10-28 | System and method for functional verification of an electronic integrated circuit design |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2003274453A1 true AU2003274453A1 (en) | 2005-05-11 |
Family
ID=34509321
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2003274453A Abandoned AU2003274453A1 (en) | 2003-10-28 | 2003-10-28 | System and method for functional verification of an electronic integrated circuit design |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2003274453A1 (en) |
WO (1) | WO2005041074A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7788658B2 (en) | 2006-05-31 | 2010-08-31 | International Business Machines Corporation | Computer code partitioning for enhanced performance |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5572437A (en) * | 1990-04-06 | 1996-11-05 | Lsi Logic Corporation | Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models |
US5544067A (en) * | 1990-04-06 | 1996-08-06 | Lsi Logic Corporation | Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation |
US5491640A (en) * | 1992-05-01 | 1996-02-13 | Vlsi Technology, Inc. | Method and apparatus for synthesizing datapaths for integrated circuit design and fabrication |
-
2003
- 2003-10-28 WO PCT/IB2003/004762 patent/WO2005041074A1/en active Application Filing
- 2003-10-28 AU AU2003274453A patent/AU2003274453A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO2005041074A1 (en) | 2005-05-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |