AU2003265339A1 - Calibration technique for locked loop circuit leakage current - Google Patents

Calibration technique for locked loop circuit leakage current

Info

Publication number
AU2003265339A1
AU2003265339A1 AU2003265339A AU2003265339A AU2003265339A1 AU 2003265339 A1 AU2003265339 A1 AU 2003265339A1 AU 2003265339 A AU2003265339 A AU 2003265339A AU 2003265339 A AU2003265339 A AU 2003265339A AU 2003265339 A1 AU2003265339 A1 AU 2003265339A1
Authority
AU
Australia
Prior art keywords
leakage current
locked loop
loop circuit
calibration technique
circuit leakage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003265339A
Inventor
Brian W. Amick
Claude R. Gauthier
Dean Liu
Pradeep Trivedi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/217,926 external-priority patent/US6614287B1/en
Priority claimed from US10/222,648 external-priority patent/US6998887B2/en
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of AU2003265339A1 publication Critical patent/AU2003265339A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0893—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump the up-down pulses controlling at least two source current generators or at least two sink current generators connected to different points in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/104—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional signal from outside the loop for setting or controlling a parameter in the loop
AU2003265339A 2002-08-13 2003-08-01 Calibration technique for locked loop circuit leakage current Abandoned AU2003265339A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US10/217,926 US6614287B1 (en) 2002-08-13 2002-08-13 Calibration technique for delay locked loop leakage current
US10/217,926 2002-08-13
US10/222,648 2002-08-16
US10/222,648 US6998887B2 (en) 2002-08-16 2002-08-16 Calibration technique for phase locked loop leakage current
PCT/US2003/024093 WO2004015868A1 (en) 2002-08-13 2003-08-01 Calibration technique for locked loop circuit leakage current

Publications (1)

Publication Number Publication Date
AU2003265339A1 true AU2003265339A1 (en) 2004-02-25

Family

ID=31720180

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003265339A Abandoned AU2003265339A1 (en) 2002-08-13 2003-08-01 Calibration technique for locked loop circuit leakage current

Country Status (2)

Country Link
AU (1) AU2003265339A1 (en)
WO (1) WO2004015868A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102010048584B4 (en) * 2010-10-18 2018-05-17 Texas Instruments Deutschland Gmbh Electronic device and method for phase locked loop

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4806879A (en) * 1987-05-01 1989-02-21 Ecrm Incorporated Method and apparatus for synchronizing to a pulse train packet signal
US5307099A (en) * 1990-11-30 1994-04-26 Minolta Camera Kabushiki Kaisha Film cartridge accomodating device which prevents previously used cartridges from being employed in a camera or the like
EP0914714B1 (en) * 1997-05-23 2004-02-25 Koninklijke Philips Electronics N.V. Receiver having a phase-locked loop

Also Published As

Publication number Publication date
WO2004015868A1 (en) 2004-02-19

Similar Documents

Publication Publication Date Title
AU2003250755A1 (en) Circuit arrangement for generating an iq signal
AU2003265364A1 (en) Transient detection circuit
AU2003237218A1 (en) Fiducial markers for mri
EP1184988A3 (en) PLL circuit
AU2003247695A1 (en) Silicon-on-insulator wafer for integrated circuit
AU2003215141A1 (en) Profile refinement for integrated circuit metrology
AU2003227947A1 (en) Circuit fabrication method
AU2003207892A1 (en) An interconnect-aware methodology for integrated circuit design
AU2003298592A1 (en) Second order predistortion circuit
AU2003281955A1 (en) Circuit arrangement for frequency division and phase locked loop with said circuit arrangement
AU2002353355A1 (en) Circuit arrangement for operation of one or more lamps
AU2003283683A1 (en) Amplifier circuit having an impedance-controllable bias-boosting circuit
AU2003283959A1 (en) Integrated circuit oscillator
AU2003270732A1 (en) Current limiting circuit
AU2002344983A1 (en) Phase-locked loop circuit
AU2002251897A1 (en) Digital leakage compensation circuit
AU2003285694A1 (en) Circuit arrangement
AU2003265339A1 (en) Calibration technique for locked loop circuit leakage current
AU2002367071A1 (en) Phase synchronization circuit
AU2002364112A1 (en) Under-voltage detection circuit
AU2003233000A1 (en) Clocked comparator circuit
AU2003301490A1 (en) Automatic-bias amplifier circuit
AU2003267183A1 (en) Temperature-compensated current reference circuit
AU2003216281A1 (en) A power-down scheme for an integrated circuit
AU2002348869A1 (en) Integrated circuit with an amplifier

Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase