AU2003244959A1 - Phase-locked-loop circuit and method - Google Patents

Phase-locked-loop circuit and method

Info

Publication number
AU2003244959A1
AU2003244959A1 AU2003244959A AU2003244959A AU2003244959A1 AU 2003244959 A1 AU2003244959 A1 AU 2003244959A1 AU 2003244959 A AU2003244959 A AU 2003244959A AU 2003244959 A AU2003244959 A AU 2003244959A AU 2003244959 A1 AU2003244959 A1 AU 2003244959A1
Authority
AU
Australia
Prior art keywords
locked
phase
loop circuit
loop
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003244959A
Inventor
Hayden C. Cranford Jr.
Vernon R. Norman
Martin Schmatz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of AU2003244959A1 publication Critical patent/AU2003244959A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/101—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop
    • H03L7/102—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop the additional signal being directly applied to the controlled loop oscillator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
AU2003244959A 2002-07-31 2003-06-27 Phase-locked-loop circuit and method Abandoned AU2003244959A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP02017218 2002-07-31
EP02017218.5 2002-07-31
PCT/IB2003/002918 WO2004015869A1 (en) 2002-07-31 2003-06-27 Phase-locked-loop circuit and method

Publications (1)

Publication Number Publication Date
AU2003244959A1 true AU2003244959A1 (en) 2004-02-25

Family

ID=31502685

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003244959A Abandoned AU2003244959A1 (en) 2002-07-31 2003-06-27 Phase-locked-loop circuit and method

Country Status (2)

Country Link
AU (1) AU2003244959A1 (en)
WO (1) WO2004015869A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2504308A (en) * 2012-07-25 2014-01-29 Phasor Solutions Ltd Phase locked loop with digital coarse tuning circuit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5686864A (en) * 1995-09-05 1997-11-11 Motorola, Inc. Method and apparatus for controlling a voltage controlled oscillator tuning range in a frequency synthesizer
US6993107B2 (en) * 2001-01-16 2006-01-31 International Business Machines Corporation Analog unidirectional serial link architecture

Also Published As

Publication number Publication date
WO2004015869A1 (en) 2004-02-19
WO2004015869A8 (en) 2004-04-22

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase