AU2003201366A1 - Variable response ADSL filter - Google Patents

Description

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AUSTRALIA

PATENTS ACT 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT

ORIGINAL

Name of Applicant: Actual Inventor/s: Address for Service:

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Invention Title: Nimrod Designs Limited Graham William Ockleston Baldwin Shelston Waters MARGARET STREET SYDNEY NSW 2000 3710000352 VARIABLE RESPONSE ADSL FILTER 4.* The following statement is a full description of this invention, including the best method of performing it known to us:- File: 38407AUP00 500133237 1.DOC/SB44 Variable Response ADSL Filter Field of the invention This invention relates to filters for use with telecommunication systems. The invention is directed particularly, but not solely, to the control of certain impedance characteristics of Asynchronous Digital Subscriber Line (ADSL) filters.

Background The application of distributed filters in an ADSL installation is now well established as a way of allowing customers to install their own ADSL service and the use of this technique means that several filters are often connected in parallel on the ADSL line. This parallel connection can lead to poor return loss performance at voice frequencies due to the effect of the combined transverse impedances of the filters. In addition, those filters that are not terminated by off hook POTS (Plain Old Telephone Service) terminals can exhibit a series resonance that can either affect the voice band return loss, or provide a detrimental loading to the ADSL signal.

Object It is an object of the present invention to provide apparatus or methods which will alleviate one or more disadvantages of known filter constructions, or to at least provide the public with a useful alternative.

Summary of the Invention Accordingly in a first aspect the invention provides a filter having a first longitudinal conduction path between a first input and first output, and a second longitudinal conduction path. between a second input and a second output, the first and second longitudinal conduction paths each including at least one longitudinal filter element, at least one transverse conduction path provided between the first and second longitudinal conduction paths, the transverse conduction path including at least one transverse filter element, and a controlled variable resistance means associated with the transverse conduction path.

In a further aspect the invention provides a method of controlling a filter having two longitudinal conduction paths and a transverse conduction path connected between the longitudinal conduction paths, the longitudinal conduction path each including a longitudinal filter element and the transverse conduction path including a transverse filter element, the method comprising the steps of: sensing a predetermined current or voltage characteristic occurring in one or both of the longitudinal paths, and controlling conduction through the transverse conduction path to provide a desired filter response.

In a further aspect the invention provides a controlled resistance circuit for a filter, the filter having first and second longitudinal conduction paths and a transverse conduction path provided between the longitudinal paths, the controlled resistance circuit comprising a variable resistance element associated with the transverse conduction path, and control means to control the magnitude of the resistance of the variable resistance means dependent on a predetermined voltage or current characteristic occurring in one or both of the longitudinal conduction paths.

In a further aspect the invention provides a communications filter including a line connection port for connection to a communications line, a subscriber connection port for connection to subscriber equipment, a controlled resistance circuit, and control means to sense a condition of the line and control a resistance of the controlled resistance circuit in response to the sensed line condition.

In a further aspect the invention provides a method of reducing the effect of undesired transient signals in a communications filter, the method including the steps of providing a controlled resistance circuit, sensing a change in a condition of subscriber equipment to which the filter is connected in use, and using the controlled resistance circuit to vary a transverse impedance of the filter to thereby reduce any undesired transient signals resulting from the change in condition.

In a further aspect the invention provides a communications filter including a line connection port for connection to a communications line, a subscriber connection port for connection to subscriber equipment capable of being disposed in an on-hook condition and an off-hook condition, a secondary filter circuit which is operable when the subscriber equipment is in the on-hook state, and disabling means to disable the secondary filter circuit when the subscriber equipment is in the off-hook state.

The invention may also broadly be said to consist in any new part, feature, or element whether alone or in combination which is described herein. Those skilled in the art to which the invention relates will understand that the examples and embodiments described herein are for illustrative purposes only and that various modifications or changes may be made which come within the scope of the appended claims.

For the purposes of this specification and claims, the term "comprise", or variations such as "comprises" and "comprising" is to be interpreted in an inclusive sense unless the context clearly requires otherwise.

Drawing Description The preferred embodiment(s) of the invention are discussed below by way of example, with reference to the accompanying drawings, in which: Figures 1 2 are diagrammatic representations of a filter according to the invention, Figure 3 is a circuit diagram of control circuitry according to the invention, and Figure 4 is a circuit diagram of a preferred embodiment of a filter according to the invention.

Detailed Description The invention provides one way of avoiding the effect of the transverse elements in a filter.

For example, in an ADSL filter the invention can be used to prevent these transverse elements from conducting when the filter is not required. As illustrated in Figure 1, the invention uses voltage controlled variance resistance elements to allow the transverse elements 2 in a filter to conduct signals only when they are needed, for example when the POTS terminal connected in use to the outputs AO and 0BO of the filter is off hook and therefore drawing line current through the filter. The invention makes use of FET transistors in the preferred embodiment as voltage controlled resistances to conduct the transverse elements of an ADSL filter in a controlled manner that ensures that no substantial or problematic transient occurs when the transverse elements are allowed to conduct or when conduction is disallowed. Thus the invention allows one or more selected transient signals present on the filter conduction paths, or on the communications line which is connected in use to inputs Al and BI, to be reduced.

As shown in the drawings, the filter has two general longitudinal conduction paths 4 with "series" or longitudinal elements 5. Between the longitudinal paths 4 is at least one transverse conduction path 3 in which a transverse element 2 is located. The invention may be applied to any transverse elements in a filter and these transverse elements may be formed by any single component or any combination of resistive, capacitive or inductive components. Practical applications of this invention have allowed distributed filters to be constructed that, when terminated in POTs terminals in their on hook state, have no measurable effect on the performance of a filter that is terminated by a POTs terminal in the off hook state. It is possible to have virtually any quantity of filters thus connected in the commonly applied distributed connection, unlike many current designs that must be limited to typically four per installation to control the level of signal degradation that occurs due to their residual transverse impedance effects.

A preferred embodiment of the invention may be conveniently described in two sections: the voltage controlled resistance element 6 and a current sensing circuit 7 that creates a control voltage for the voltage controlled resistor elements.

fa) Voltage Controlled Resistance Elements Those skilled in the art will appreciate that the controlled variable resistance arrangement of the inventor does not necessarily have to be voltage controlled. Therefore the following is a description of a preferred embodiment only and is not intended to be limiting.

Referring to Figure 2 the voltage controlled resistance arrangement of the present invention is formed by an enhancement mode N channel FET transistor 10 that has its source connected to one longitudinal path or leg of the ADSL filter and with its drain connected to one end of one of the transverse elements 2; the other end of each of the transverse elements 2 are connected to the other leg of the filter. A control voltage is applied to the gate of the FET through a resistor. For situations where the line polarity is reversed, the same combination of FET and transverse elements is connected in the opposite direction between the legs of the filter. This allows one FET to control the transverse elements for one line polarity, whilst the other FET is used to control the transverse elements when the line polarity is reversed.

When the POTS terminal connected to the filter is taken off hook, a control voltage is generated that increases in level at a controlled rate to reduce the resistance of the FET. In this manner, the transverse element is steadily allowed to conduct signals and no switching type transient is introduced. This eliminates the need for transient suppressor components or circuitry to be applied to eliminate switching transients from appearing on the line side of the filter. In a reverse manner, when the POTS terminal goes on hook, the control voltage is reduced in a controlled manner to reduce the resistance of the FET to disallow the conduction of signals through the transverse element and this occurs in such a way that no switching type transients occur on the line side of the filter.

To anyone skilled in the art to which the invention relates it may be seen that P channel FETs could be used instead of N channel types, with an appropriate reversal of the polarity of the control voltage applied to the gate, Furthermore, other semiconductor devices may be used to create a controlled resistance element having the required properties set forth above.

Current Sensing (Control Voltage) Circuit In the most preferred embodiment of the invention, a separate circuit is used to generate the control voltage for the voltage controlled resistance elements and this control voltage is generated when the POTS terminal connected to the filter goes off hook and draws current through the longitudinal conduction paths in legs of the filter. The voltage control circuits are separate giving several advantages, some being: to allow one control voltage to control more than one voltage controlled resistance stage for filters with more than one transverse element 2 that needs to be controlled to generate appropriate control voltages for each polarity of the line voltage to maintain the quality of the longitudinal balance of the filter by allowing identical voltage control circuits to be connected in series with each leg of the filter. This ensures that any effect caused by the circuit is replicated in each leg, restoring the balanced nature of the filter.

A particular advantage of the control voltage circuit is the ability to apply a delay if desired to the control of the transverse elements in a filter. For example, this allows the transverse elements to conduct signals for a period after the POTs terminal has gone on hook, so that the transients thus produced by this abrupt change of line current can be reduced by the presence of the transverse elements, before the voltage controlled resistance in series with them is increased to reduce the transverse signal flow.

Referring to Figure 3, the control voltage circuit of the present invention will be described. To facilitate ease of description, the operation of the filter is described with reference to one polarity, and the corresponding components provided for operation with the reverse polarity are indicated in brackets.

A PNP transistor Q1 (Q2) is provided with its base and emitter connected in parallel with a current sensing resistance formed by the DC resistance of inductance LS There is also a voltage limiter formed by a pair of diodes D1 and 04 (D2 and D3) connected in reverse direction to each other, and both are in parallel with this combination of transistor Q1(Q2) and inductor resistance. The collector of the transistor Q1 (Q2) is connected to the anode of a reverse voltage blocking diode D5 (D7) and the cathode of that diode is connected to a resistor R4 The other end of this resistor is connected to the cathode of a zener diode D6 the anode of which is connected to the other leg of the balanced filter. Zener diode D6 (D8) limits the charging of a capacitor C1 (C2) to keep the FET 10 (refer figure 2) in the resistive operating range and to protect the gates of each FET 10 (figure 2) against overvoltages. This capacitor C1 (C2) is charged through a resistance R6(R10) by the zener voltage, and when the POTs terminal goes on hook, the PNP Q1(Q2) transistor turns off allowing the capacitor.to be discharged through a resistor R7 (R9) across the zener diode.

When the POTS terminal across the filter is in the off hook condition, it draws current through the inductor L8(L4) and diode combination, and for inductor resistance values of 100 ohms, the voltage across this combination allows base emitter current to flow in the PNP transistor 01 (Q2) for fine currents of about 5 mA and above. This base current causes the transistor to conduct collector current through the diode D5(D7) and resistor R4(R8) series combination and so the voltage across the zener D6(D8) rises, causing the capacitor C1(C2) to rise in voltage in a controlled rate, to ultimately equal the voltage on the zener. This control voltage is applied to the gates of the corresponding voltage controlled resistances formed by FET(s) 10 (figure 2) whose resistance is steadily reduced to a low value in a controlled manner and thus the transverse elements of the filter are allowed to conduct, and this controlled change does not cause, or at least significantly reduces, any switching type of transient to the line Al- BI side of the filter.

When the POTS terminal across the filter is put into the on hook condition it will draw line current significantly below the 5mA threshold and the PNP transistor QI(Q2) will not conduct collector current. The control voltage across the capacitor C1(C2) will reduce in a controlled rate by the discharge path of the resistor R10 O(R6) between the capacitor and the zener diode D6(DB) and the resistor R7(R9)across the zener. In this way the control voltage applied to the gates of the corresponding voltage controlled resistances formed by FET(s) 10 (figure 2) makes them steadily increase their resistance to a high value in a controlled manner and thus the transverse elements of the filter are not allowed to conduct signals, and this change does not cause, or at least significantly reduces, any switching type of transient to the line side Al- BI of the filter. In addition, the inherent time delay in this action allows the transverse capacitors together with their associated series inductances, to form a transient filter to eliminate any transients caused by the change of line voltage to the on hook state, and so eliminate any interference to the ADSL signals on the line side of the filter.

As will be understood from the foregoing description, two identical control voltage circuits are provided, one based about each of transistors 01 and Q2. The control circuits are preferably formed in the same corresponding position in the other leg of the balanced filter. For one polarity of line voltage one circuit is operative and the other is inactive, and vice-versa for the other polarity of line voltage. In this way, control voltages are generated as required for the appropriate FET(s) acting as voltage controlled resistances for each polarity of line voltage.

To anyone skilled in the art to which the invention relates it may be seen that other semiconductor devices may be used. For example, an NPN type transistor together with appropriate polarity reversals of other components may replace the transistor in the control voltage circuit, and P channel FET(s) can be used to form the voltage controlled resistances.

Preferred Embodiment of a Filter According to the Present invention including Resistance Circuit and Control Circuit A preferred embodiment of the present invention is illustrated in figure 4 which is an illustration of a high performance, full rate ADSL filter. The values for individual components will vary depending on the required filter characteristics, but one skilled in the art will be able to select appropriate values from the description herein and the figures. To facilitate ease of description, the operation of the filter is described with reference to one polarity, and the corresponding components provided for operation with the reverse polarity are indicated in brackets.

Referring to figure 4, it can be seen that the basic filter is formed by a single inductor L1 in series with the input AI(BI), a first stage of transverse elements formed by a capacitor C3(C8) in series with a MOSFET Q6 a second series inductor L2 (L6) in parallel with a resonating capacitor C13 all in series with a parallel combination of L3(L7) and R11 a second stage of transverse elements formed by a capacitor in series with a MOSFET, C7 and Q8 (C5 and Q5); this followed by a voltage control circuit in each series leg of the filter leading to the output terminal. A network formed by inductor L9 in parallel with resistor R1 is in this transverse path to improve the stop band attenuation.

When the input line voltage on the Al-AO longitudinal conduction path (or leg) of the filter is positive with respect to the BI-BO leg, the off hook current flow to the POTs terminal connected to the output terminals AO and 0BO will cause a voltage drop across the resistance of L8 and L4. For line currents above about 5mA Q1 (Q2) will be turned on, causing C1 (C2) to charge up through D5 (D7) and R4 thus providing a control voltage to the gates of MOSFETs Q3 and Q5 (Q6 and Q8). As these enhancement mode FET devices are operating at low voltages and in their linear mode, the control voltage controls their resistance, which reduces with increasing control voltage. Thus when the POTs terminal is taken off hook, the transverse capacitors C3 and C5 (CS, and C7) are increasingly allowed to conduct transverse signals within the filter in such a way that would not be possible if they were simply switched into circuit. This variable resistive action eliminates, or at least substantially reduces, transients such as transient voltages that would be caused by switching of the transverse elements.

When the POTs terminal is put into the on hook state, Q1 (Q2) stops conducting and the control voltage on Cl (C2) is allowed to diminish to zero through the discharge action of R14 and R7 (R13 and R9). The discharge time constant formed by these two resistances and Cl (C2) provides a time delay before the voltage controlled resistances formed by FETs Q3 and (Q6 and Q8) are allowed to increase their resistance to reduce the current flow through their transverse capacitors C3 and C5 (C8 and C7). This time delay allows the transverse capacitors together with their associated series inductances, to temporarily form a transient filter to eliminate at least one or more selected transient signals, and preferably all significant transient signals caused by the change of line voltage to the on hook state, and so eliminate any interference to the ADSL signals on the line side of the filter.

When the input line voltage on the AI-AO leg of the filter is negative with respect to the 81-BO leg, an identical action occurs in the other parts of the filter whose active elements in this case are formed by transistor Q2 and MOSFETs 06 and Q8.

An impedance correction circuit to improve the passband return loss performance is formed by the parallel combination of L3 (L7) and R 1 (R10). This compensation circuit is placed in a near central position in the filter to give better symmetry to the design, allowing the filter to give very similar return loss performance at both the line port AI-BI and local port AO-BO.

The correction circuit, in combination with the transverse elements on one end, also serves to assist in improving the filter stopband performance.

When the POTs terminal is on hook, diodes D1 and D4 (D2 and D3) do not have any line current through them and so they do not act as shunt across L8 This allows L8 (L4) and C4 to provide an additional stage of filtering that significantly adds to the attenuation 11 already provided by the series elements comprising L1 C13 L2 L3 and R11 I (R10). Thus the diodes D1 and D4 (D2 and D3) effectively disengage or disable the secondary filter circuit provided by L8 (L4) and C4 when the POTs terminal is in the off hook condition, but allow this filter circuit to be effective when the POTs terminal is in the on hook condition. Although the illustrated diode arrangement is used to provide a shunt disengagement action, this could be replaced by another component or components such as a semiconductor switching device, for example, that could perform the disable function.

The invention thus provides a filter, in particularly an in line filter suitable for ADSL applications which has advantages of improved performance when the subscriber equipment is in an off hook or on hook state, and improves performance during transitions between such states.

Claims (39)

1. A communications filter having a first longitudinal conduction path between a first input and first output, and a second longitudinal conduction path between a second input and a second output, the first and second longitudinal conduction paths each including at least one longitudinal filter element, at least one transverse conduction path provided between the first and second longitudinal conduction paths, the transverse conduction path including at least one transverse filter element, and a controlled variable resistance means associated with the transverse conduction path.

2. A communications filter as claimed in claim 1 wherein the controlled variable resistance means enable a resistance associated with the transverse conduction path to be varied to provide the filter with a desired performance characteristic.

3. A communications filter as claimed in claim 1 or claim 2 wherein the controlled variable resistance means can be varied to vary the transverse impedance of the filter dependent on the condition of the longitudinal conduction paths.

4. A communications filter as claimed in any one of the preceding claims wherein the controlled variable resistance means can be varied to maximise the transverse impedance of the filter when a subscriber device connected between the first and second outputs is not in use, and to provide a desired transverse impedance when the device is in use.

A communications filter as claimed in any one of the preceding claims wherein the controlled variable resistance means is controlled in such a manner as to reduce one or more selected transients occurring in at least one of the longitudinal conduction paths.

6. A communications filter as claimed in any one of the preceding claims wherein the controlled variable resistance means is controlled in such a manner as to reduce one or more selected transients occurring in at least one of the longitudinal conduction paths resulting from a change in the of state of a subscriber device to which the outputs are connected.

7. A communications filter as claimed in any one of the preceding claims including a control circuit to control the resistance of the controlled variable resistance means.

8. A communications filter as claimed in claim 7 wherein the control circuit provides a control signal to control the magnitude of the resistance of the variable resistance means.

9. A communications filter as claimed in claim 7 or claim 8 wherein the control circuit includes sensing means to sense a condition of at least one of the longitudinal conduction paths

10. A communications filter as claimed in claim 9 wherein the condition includes a current or voltage condition of at least one of the longitudinal conduction paths.

11. A communications filter as claimed in claim 9 or claim 10 wherein the condition includes a change in a current or voltage condition of at least one of the longitudinal conduction paths.

12. A communications filter as claimed in any one of claims 7 to 11 wherein the control circuit further includes timing means which may be used to time a variation of the control signal in order to delay the control signal relative to a change of state of the device connected between the first and second outputs.

13. A communications filter as claimed in any one of claims 7 to 12 wherein the control signal may be used to control a plurality of controlled variable resistance means.

14. A communications filter as claimed in any one of claims 7 to 13 wherein a control circuit is provided in each longitudinal path.

15. A communications filter as claimed in any one of the preceding claims wherein the controlled variable resistance means comprises a controlled resistance element.

16. A communications filter as claimed in claim 15 wherein the controlled resistance element is a voltage controlled variable resistance element.

17. A communications filter as claimed in claim 15 or claim 16 wherein the controlled variable resistance elements comprise P channel or N channel enhancement mode FETs.

18. A communications filter as claimed in any one of the preceding claims wherein the transverse element comprises a capacitive element or an inductive element, or a resistive element or a combination of one or more of these elements.

19. A communications filter as claimed in any one of the preceding claims wherein a plurality of transverse elements is provided.

A communications filter as claimed in any one of the preceding claims wherein the controlled variable resistance means is connected series with the transverse conduction path.

21. A method of controlling a communication filter having two longitudinal conduction paths and a transverse conduction path connected between the longitudinal conduction paths, the longitudinal conduction paths each including a longitudinal filter element and the transverse conduction path including a transverse filter element, the method comprising the steps of: sensing a predetermined current or voltage characteristic occurring in at least one of the longitudinal paths, and controlling conduction through the transverse conduction path to provide a desired filter response.

22. A method as claimed in claim 21 wherein the step of controlling conduction through the transverse conduction path includes a step of controlling conduction to reduce at least one selected transient signal.

23. A method as claimed in claim 21 or claim 22 wherein the step of sensing a predetermined current or voltage characteristic includes a step of sensing an increase or decrease in current.

24. A communications filter including a line connection port for connection to a communications line, a subscriber connection port for connection to subscriber equipment, a controlled resistance circuit, and control means to sense a condition of the subscriber equipment and control a resistance of the controlled resistance circuit in response to the sensed condition.

A communications filter as claimed in claim 24 wherein the controlled resistance circuit can selectively vary a transverse impedance of the filter dependent on the sensed condition.

26. A communications filter as claimed in claim 24 or claim 25 wherein the controlled resistance circuit can maximise a transverse impedance of the filter when the subscriber equipment is not in use, and provide a desired transverse impedance when the equipment is in use.

27. A communications filter as claimed in any one of claims 24 to 26 wherein the controlled resistance circuit is controlled in such a manner as to reduce one or more selected transients occurring in response to a change in state of the subscriber equipment.

28. A communications filter as claimed in any one of claims 24 to 27 including a control circuit which provides a control signal to control the magnitude of a variable resistance provided by the controlled resistance circuit.

29. A communications filter as claimed in any one of claims 24 to 28 including sensing means whereby the sensed condition is detected by sensing a change in current or voltage in a filter conduction path.

A communications filter as claimed in claim 28 wherein the control circuit further includes timing means which may be used to time a variation of the control signal in order to delay the control signal relative to a change of state of the equipment.

31. A communications filter as claimed in any one of claims 24 to 30 wherein the controlled resistance circuit comprises a controlled resistance element.

32. A communications filter as claimed in claim 31 wherein the controlled resistance element is a voltage controlled variable resistance element.

33. A communications filter as claimed in claim 31 or claim 32 wherein the controlled variable resistance elements comprise P channel or N channel enhancement mode FETs.

34. A method of reducing the effect of undesired transient signals in a communications filter, the method including the steps of providing a controlled resistance circuit, sensing a change in a condition of subscriber equipment to which the filter is connected in use, and using the controlled resistance circuit to vary a transverse impedance of the filter to thereby reduce any undesired transient signals resulting from the change in condition.

35. A communications filter including a line connection port for connection to a communications line, a subscriber connection port for connection to subscriber equipment capable of being disposed in an on-hook condition and an off-hook condition, a secondary filter circuit which is operable when the subscriber equipment is in the on- hook state, and disabling means to disable the secondary filter circuit when the subscriber equipment is in the off-hook state.

36. A communications filter as claimed in claim 35 wherein the disabling means comprises one or more diodes.

37. A communications filter substantially as herein described with reference to any one or more of the accompanying drawings.

38. A method of controlling a communications filter substantially as herein described with reference to any one or more of the accompanying drawings.

39. A method of reducing the effect of undesired transient signals in a communications filter substantially as herein described with reference to any one or more of the accompanying drawings. DATED this 19th Day of March 2003 BALDWIN SHELSTON WATERS Attorneys for: NIMROD DESIGNS LIMITED