AU2002342148A1 - Chip scale stacking system and method - Google Patents

Chip scale stacking system and method

Info

Publication number
AU2002342148A1
AU2002342148A1 AU2002342148A AU2002342148A AU2002342148A1 AU 2002342148 A1 AU2002342148 A1 AU 2002342148A1 AU 2002342148 A AU2002342148 A AU 2002342148A AU 2002342148 A AU2002342148 A AU 2002342148A AU 2002342148 A1 AU2002342148 A1 AU 2002342148A1
Authority
AU
Australia
Prior art keywords
chip scale
stacking system
scale stacking
chip
stacking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002342148A
Inventor
Jeff Buchle
James W. Cady
Julian Dowden
David L. Roper
James Douglas Wehrly
James Wilder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Entorian Technologies Inc
Original Assignee
Entorian Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Entorian Technologies Inc filed Critical Entorian Technologies Inc
Publication of AU2002342148A1 publication Critical patent/AU2002342148A1/en
Abandoned legal-status Critical Current

Links

AU2002342148A 2001-10-26 2002-10-25 Chip scale stacking system and method Abandoned AU2002342148A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/005,581 2001-10-26

Publications (1)

Publication Number Publication Date
AU2002342148A1 true AU2002342148A1 (en) 2003-05-06

Family

ID=

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