AU2002340182A1 - Bus framer for time division multiplexed bus - Google Patents

Bus framer for time division multiplexed bus

Info

Publication number
AU2002340182A1
AU2002340182A1 AU2002340182A AU2002340182A AU2002340182A1 AU 2002340182 A1 AU2002340182 A1 AU 2002340182A1 AU 2002340182 A AU2002340182 A AU 2002340182A AU 2002340182 A AU2002340182 A AU 2002340182A AU 2002340182 A1 AU2002340182 A1 AU 2002340182A1
Authority
AU
Australia
Prior art keywords
bus
time division
framer
division multiplexed
multiplexed bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002340182A
Inventor
Gabriel Moreno Fortuny
Jesus Palomino Echartea
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU2002340182A1 publication Critical patent/AU2002340182A1/en
Abandoned legal-status Critical Current

Links

AU2002340182A 2001-10-15 2002-10-11 Bus framer for time division multiplexed bus Abandoned AU2002340182A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60/329,809 2001-10-15
US10/032,743 2001-10-25

Publications (1)

Publication Number Publication Date
AU2002340182A1 true AU2002340182A1 (en) 2003-04-28

Family

ID=

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