AU2002315382A1 - Pass-transistor very large scale integration - Google Patents

Pass-transistor very large scale integration

Info

Publication number
AU2002315382A1
AU2002315382A1 AU2002315382A AU2002315382A AU2002315382A1 AU 2002315382 A1 AU2002315382 A1 AU 2002315382A1 AU 2002315382 A AU2002315382 A AU 2002315382A AU 2002315382 A AU2002315382 A AU 2002315382A AU 2002315382 A1 AU2002315382 A1 AU 2002315382A1
Authority
AU
Australia
Prior art keywords
transistor
pass
large scale
scale integration
integration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002315382A
Inventor
Prakash R. Bhatia
Gary K. Maki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
UNM Rainforest Innovations
Original Assignee
STC UNM
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/172,742 external-priority patent/US6829750B2/en
Application filed by STC UNM filed Critical STC UNM
Publication of AU2002315382A1 publication Critical patent/AU2002315382A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/327—Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/06—Protocols specially adapted for file transfer, e.g. file transfer protocol [FTP]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/10—Protocols in which an application is distributed across nodes in the network
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
    • H04L69/329—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the application layer [OSI layer 7]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
AU2002315382A 2001-06-15 2002-06-17 Pass-transistor very large scale integration Abandoned AU2002315382A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US29881801P 2001-06-15 2001-06-15
US60/298,818 2001-06-15
US10/172,742 2002-06-14
US10/172,742 US6829750B2 (en) 2001-06-15 2002-06-14 Pass-transistor very large scale integration
PCT/US2002/019572 WO2002103902A2 (en) 2001-06-15 2002-06-17 Pass-transistor very large scale integration

Publications (1)

Publication Number Publication Date
AU2002315382A1 true AU2002315382A1 (en) 2003-01-02

Family

ID=26868413

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002315382A Abandoned AU2002315382A1 (en) 2001-06-15 2002-06-17 Pass-transistor very large scale integration

Country Status (2)

Country Link
AU (1) AU2002315382A1 (en)
WO (1) WO2002103902A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018069785A1 (en) 2016-10-12 2018-04-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and system using the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5200907A (en) * 1990-04-16 1993-04-06 Tran Dzung J Transmission gate logic design method
JP3144967B2 (en) * 1993-11-08 2001-03-12 株式会社日立製作所 Semiconductor integrated circuit and method of manufacturing the same
JPH0993118A (en) * 1995-09-22 1997-04-04 Kawasaki Steel Corp Path transistor logic circuit
US5955912A (en) * 1995-10-25 1999-09-21 Texas Instruments Incorporated Multiplexer circuits

Also Published As

Publication number Publication date
WO2002103902A2 (en) 2002-12-27
WO2002103902A3 (en) 2003-09-12

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase