AU2002234154A1 - Method and apparatus for improving the efficiency of cache memories using stored activity measures - Google Patents

Method and apparatus for improving the efficiency of cache memories using stored activity measures

Info

Publication number
AU2002234154A1
AU2002234154A1 AU2002234154A AU3415402A AU2002234154A1 AU 2002234154 A1 AU2002234154 A1 AU 2002234154A1 AU 2002234154 A AU2002234154 A AU 2002234154A AU 3415402 A AU3415402 A AU 3415402A AU 2002234154 A1 AU2002234154 A1 AU 2002234154A1
Authority
AU
Australia
Prior art keywords
improving
efficiency
cache memories
activity measures
stored activity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002234154A
Inventor
Raju C. Bopardikar
Jack J. Stiffler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Cereva Networks Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cereva Networks Inc filed Critical Cereva Networks Inc
Publication of AU2002234154A1 publication Critical patent/AU2002234154A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/122—Replacement control using replacement algorithms of the least frequently used [LFU] type, e.g. with individual count value
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/31—Providing disk cache in a specific location of a storage system
    • G06F2212/312—In storage controller

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
AU2002234154A 2000-10-26 2001-10-19 Method and apparatus for improving the efficiency of cache memories using stored activity measures Abandoned AU2002234154A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/697,765 US6640285B1 (en) 2000-10-26 2000-10-26 Method and apparatus for improving the efficiency of cache memories using stored activity measures
US09/697,765 2000-10-26
PCT/US2001/050797 WO2002035361A2 (en) 2000-10-26 2001-10-19 Method and apparatus for improving the efficiency of cache memories using stored activity measures

Publications (1)

Publication Number Publication Date
AU2002234154A1 true AU2002234154A1 (en) 2002-05-06

Family

ID=24802441

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002234154A Abandoned AU2002234154A1 (en) 2000-10-26 2001-10-19 Method and apparatus for improving the efficiency of cache memories using stored activity measures

Country Status (3)

Country Link
US (1) US6640285B1 (en)
AU (1) AU2002234154A1 (en)
WO (1) WO2002035361A2 (en)

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US7058763B2 (en) * 2001-05-04 2006-06-06 Lucent Technologies Inc. File system for caching web proxies
US7089357B1 (en) 2003-09-22 2006-08-08 Emc Corporation Locally buffered cache extensions having associated control parameters to determine use for cache allocation on subsequent requests
US20060136668A1 (en) * 2004-12-17 2006-06-22 Rudelic John C Allocating code objects between faster and slower memories
US7809903B2 (en) * 2005-12-15 2010-10-05 Intel Corporation Coordinating access to memory locations for hardware transactional memory transactions and software transactional memory transactions
US8683143B2 (en) * 2005-12-30 2014-03-25 Intel Corporation Unbounded transactional memory systems
US8180967B2 (en) * 2006-03-30 2012-05-15 Intel Corporation Transactional memory virtualization
US8180977B2 (en) * 2006-03-30 2012-05-15 Intel Corporation Transactional memory in out-of-order processors
JP4859595B2 (en) * 2006-09-01 2012-01-25 株式会社日立製作所 Storage system, data relocation method thereof, and data relocation program
US20090144388A1 (en) * 2007-11-08 2009-06-04 Rna Networks, Inc. Network with distributed shared memory
US20090150511A1 (en) 2007-11-08 2009-06-11 Rna Networks, Inc. Network with distributed shared memory
US9477515B2 (en) 2009-12-15 2016-10-25 Intel Corporation Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode
US8521995B2 (en) * 2009-12-15 2013-08-27 Intel Corporation Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode
US8316194B2 (en) 2009-12-15 2012-11-20 Intel Corporation Mechanisms to accelerate transactions using buffered stores
US8095824B2 (en) * 2009-12-15 2012-01-10 Intel Corporation Performing mode switching in an unbounded transactional memory (UTM) system
AU2010201718B2 (en) * 2010-04-29 2012-08-23 Canon Kabushiki Kaisha Method, system and apparatus for identifying a cache line
US9418011B2 (en) * 2010-06-23 2016-08-16 Intel Corporation Region based technique for accurately predicting memory accesses
US9965381B1 (en) * 2011-06-30 2018-05-08 EMC IP Holding Company LLC Indentifying data for placement in a storage system
US9195581B2 (en) * 2011-07-01 2015-11-24 Apple Inc. Techniques for moving data between memory types
US9852073B2 (en) 2012-08-07 2017-12-26 Dell Products L.P. System and method for data redundancy within a cache
US9549037B2 (en) 2012-08-07 2017-01-17 Dell Products L.P. System and method for maintaining solvency within a cache
US9495301B2 (en) 2012-08-07 2016-11-15 Dell Products L.P. System and method for utilizing non-volatile memory in a cache
EP3075118B1 (en) 2013-11-27 2019-11-20 Intel Corporation Autonomously controlling a buffer of a processor
US10877654B1 (en) * 2018-04-03 2020-12-29 Palantir Technologies Inc. Graphical user interfaces for optimizations

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
US4967353A (en) 1987-02-25 1990-10-30 International Business Machines Corporation System for periodically reallocating page frames in memory based upon non-usage within a time period or after being allocated
US5043885A (en) * 1989-08-08 1991-08-27 International Business Machines Corporation Data cache using dynamic frequency based replacement and boundary criteria
JPH0727442B2 (en) * 1991-09-11 1995-03-29 インターナショナル・ビジネス・マシーンズ・コーポレイション Method for improving hit rate in data storage device hierarchical structure and apparatus therefor
US5392415A (en) 1992-12-15 1995-02-21 International Business Machines Corporation System for grouping non-contiguous pages belonging to a storage object for page out
US6128713A (en) * 1997-09-24 2000-10-03 Microsoft Corporation Application programming interface enabling application programs to control allocation of physical memory in a virtual memory system
US6209062B1 (en) * 1997-11-24 2001-03-27 Intel Corporation Method for holding cache pages that are not invalidated within normal time duration for a second access or that are likely to be accessed again soon
US6298419B1 (en) * 1998-03-26 2001-10-02 Compaq Computer Corporation Protocol for software distributed shared memory with memory scaling
US6425057B1 (en) * 1998-08-27 2002-07-23 Hewlett-Packard Company Caching protocol method and system based on request frequency and relative storage duration
US6272598B1 (en) * 1999-03-22 2001-08-07 Hewlett-Packard Company Web cache performance by applying different replacement policies to the web cache
US6282613B1 (en) * 1999-04-30 2001-08-28 International Business Machines Corporation Very efficient technique for dynamically tracking locality of a reference
DE19961499A1 (en) 1999-12-20 2001-07-05 Ericsson Telefon Ab L M Caching objects in disk-based databases

Also Published As

Publication number Publication date
US6640285B1 (en) 2003-10-28
WO2002035361A2 (en) 2002-05-02
WO2002035361A3 (en) 2004-01-08

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