AU2002220117A1 - Turbo decoding apparatus and method implementing stopping rule with circular redundancy code signature comparison - Google Patents

Turbo decoding apparatus and method implementing stopping rule with circular redundancy code signature comparison

Info

Publication number
AU2002220117A1
AU2002220117A1 AU2002220117A AU2011702A AU2002220117A1 AU 2002220117 A1 AU2002220117 A1 AU 2002220117A1 AU 2002220117 A AU2002220117 A AU 2002220117A AU 2011702 A AU2011702 A AU 2011702A AU 2002220117 A1 AU2002220117 A1 AU 2002220117A1
Authority
AU
Australia
Prior art keywords
decoding apparatus
turbo decoding
redundancy code
method implementing
code signature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002220117A
Inventor
David Bass
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
InterDigital Technology Corp
Original Assignee
InterDigital Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by InterDigital Technology Corp filed Critical InterDigital Technology Corp
Publication of AU2002220117A1 publication Critical patent/AU2002220117A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
    • H04L1/0051—Stopping criteria
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H03M13/2975—Judging correct decoding, e.g. iteration stopping criteria
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
    • H03M13/6588—Compression or short representation of variables
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0066—Parallel concatenated codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
AU2002220117A 2000-11-14 2001-11-01 Turbo decoding apparatus and method implementing stopping rule with circular redundancy code signature comparison Abandoned AU2002220117A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US24844000P 2000-11-14 2000-11-14
US60/248,440 2000-11-14
PCT/US2001/045742 WO2002041563A2 (en) 2000-11-14 2001-11-01 Turbo decoding apparatus and method implementing stopping rule with circular redundancy code signature comparison

Publications (1)

Publication Number Publication Date
AU2002220117A1 true AU2002220117A1 (en) 2002-05-27

Family

ID=22939139

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002220117A Abandoned AU2002220117A1 (en) 2000-11-14 2001-11-01 Turbo decoding apparatus and method implementing stopping rule with circular redundancy code signature comparison

Country Status (20)

Country Link
US (1) US6956912B2 (en)
EP (2) EP1378086B9 (en)
JP (3) JP3852406B2 (en)
KR (8) KR100886858B1 (en)
CN (2) CN1874211A (en)
AR (3) AR031331A1 (en)
AT (1) ATE271289T1 (en)
AU (1) AU2002220117A1 (en)
BR (1) BR0115954A (en)
CA (2) CA2428776C (en)
DE (1) DE60104338T2 (en)
DK (1) DK1378086T3 (en)
ES (1) ES2225647T3 (en)
HK (1) HK1063548A1 (en)
IL (3) IL155880A0 (en)
MX (1) MXPA03004267A (en)
MY (1) MY126922A (en)
NO (1) NO20032162L (en)
TW (1) TW522659B (en)
WO (1) WO2002041563A2 (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7499507B2 (en) 1999-12-03 2009-03-03 Broadcom Corporation Synchronization module using a Viterbi slicer for a turbo decoder
AU4710501A (en) 1999-12-03 2001-06-18 Broadcom Corporation Interspersed training for turbo coded modulation
WO2002021702A1 (en) 2000-09-05 2002-03-14 Broadcom Corporation Quasi error free (qef) communication using turbo codes
US7242726B2 (en) 2000-09-12 2007-07-10 Broadcom Corporation Parallel concatenated code with soft-in soft-out interactive turbo decoder
US6518892B2 (en) 2000-11-06 2003-02-11 Broadcom Corporation Stopping criteria for iterative decoding
US7533320B2 (en) 2000-11-14 2009-05-12 Interdigital Technology Corporation Wireless transmit/receive unit having a turbo decoder with circular redundancy code signature comparison and method
KR100713331B1 (en) * 2000-12-23 2007-05-04 삼성전자주식회사 Apparatus and method for stopping iterative decoding in a cdma mobile communications system
JP3512176B2 (en) * 2001-05-15 2004-03-29 松下電器産業株式会社 Turbo decoding device and method of controlling number of decoding repetitions in turbo decoding
EP1499025A1 (en) * 2003-07-17 2005-01-19 Evolium S.A.S. Stop criterion for an iterative data processing method
WO2007001305A1 (en) 2005-06-27 2007-01-04 Thomson Licensing Stopping criteria in iterative decoders
EP1783916B1 (en) * 2005-11-07 2019-11-06 Samsung Electronics Co., Ltd. Apparatus and method for stopping iterative decoding in a mobile communication system
JP2010011119A (en) * 2008-06-27 2010-01-14 Nec Electronics Corp Decoding method and device
US8984377B2 (en) 2011-04-19 2015-03-17 National Kaohsiung First University Of Science And Technology Stopping methods for iterative signal processing

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4386588B2 (en) * 1998-11-05 2009-12-16 クゥアルコム・インコーポレイテッド Efficient iterative decoding process
US6298084B1 (en) * 1998-11-24 2001-10-02 Motorola, Inc. Bad frame detector and turbo decoder
EP1009098A1 (en) 1998-12-10 2000-06-14 Sony International (Europe) GmbH Error correction using a turbo code and a CRC
DE69943198D1 (en) 1998-12-30 2011-03-31 Canon Kk Coding apparatus and method, decoding apparatus and method and associated systems
US6665357B1 (en) * 1999-01-22 2003-12-16 Sharp Laboratories Of America, Inc. Soft-output turbo code decoder and optimized decoding method
DE19934646C2 (en) 1999-07-16 2001-09-13 Univ Dresden Tech Method and device for iterative decoding of chained codes
US6898254B2 (en) * 2000-01-31 2005-05-24 Texas Instruments Incorporated Turbo decoder stopping criterion improvement
US6879648B2 (en) * 2000-01-31 2005-04-12 Texas Instruments Incorporated Turbo decoder stopping based on mean and variance of extrinsics
US6526531B1 (en) * 2000-03-22 2003-02-25 Agere Systems Inc. Threshold detection for early termination of iterative decoding
US6675342B1 (en) * 2000-04-11 2004-01-06 Texas Instruments Incorporated Direct comparison adaptive halting decoder and method of use
US6591390B1 (en) * 2000-04-11 2003-07-08 Texas Instruments Incorporated CRC-based adaptive halting turbo decoder and method of use
US20010052104A1 (en) * 2000-04-20 2001-12-13 Motorola, Inc. Iteration terminating using quality index criteria of turbo codes
US6865708B2 (en) * 2000-08-23 2005-03-08 Wang Xiao-An Hybrid early-termination methods and output selection procedure for iterative turbo decoders
JP2002100995A (en) * 2000-09-22 2002-04-05 Sony Corp Decoding device and method and data receiver and receiving method
US6518892B2 (en) * 2000-11-06 2003-02-11 Broadcom Corporation Stopping criteria for iterative decoding

Also Published As

Publication number Publication date
MXPA03004267A (en) 2003-09-10
DE60104338D1 (en) 2004-08-19
CA2428776A1 (en) 2002-05-23
JP2009278686A (en) 2009-11-26
NO20032162D0 (en) 2003-05-13
WO2002041563A3 (en) 2003-10-30
TW522659B (en) 2003-03-01
KR100886858B1 (en) 2009-03-05
MY126922A (en) 2006-10-31
DK1378086T3 (en) 2004-11-15
KR20080014927A (en) 2008-02-14
AR031331A1 (en) 2003-09-17
AR054111A2 (en) 2007-06-06
DE60104338T2 (en) 2004-12-02
KR20090060350A (en) 2009-06-11
ATE271289T1 (en) 2004-07-15
CN1478340A (en) 2004-02-25
IL197056A0 (en) 2009-11-18
ES2225647T3 (en) 2005-03-16
KR100525987B1 (en) 2005-11-08
EP1378086B1 (en) 2004-07-14
JP3852406B2 (en) 2006-11-29
EP1378086A2 (en) 2004-01-07
KR100941664B1 (en) 2010-02-11
NO20032162L (en) 2003-06-24
KR100871403B1 (en) 2008-12-02
KR20080075532A (en) 2008-08-18
CA2428776C (en) 2008-01-15
CN1874211A (en) 2006-12-06
KR20090102847A (en) 2009-09-30
CA2604072A1 (en) 2002-05-23
KR20040055719A (en) 2004-06-26
JP2004527142A (en) 2004-09-02
EP1418697A1 (en) 2004-05-12
EP1378086B9 (en) 2005-01-05
US20020061079A1 (en) 2002-05-23
BR0115954A (en) 2004-01-06
CN1264298C (en) 2006-07-12
KR20090016728A (en) 2009-02-17
KR100926812B1 (en) 2009-11-12
IL155880A (en) 2008-07-08
WO2002041563A2 (en) 2002-05-23
KR101022730B1 (en) 2011-03-22
KR20070065445A (en) 2007-06-22
KR20040100836A (en) 2004-12-02
HK1063548A1 (en) 2004-12-31
JP2006325259A (en) 2006-11-30
US6956912B2 (en) 2005-10-18
IL155880A0 (en) 2003-12-23
KR100744201B1 (en) 2007-08-01
AR065022A2 (en) 2009-05-13

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