AU2002212898A1 - Priority signaling for cell switching - Google Patents

Priority signaling for cell switching

Info

Publication number
AU2002212898A1
AU2002212898A1 AU2002212898A AU1289802A AU2002212898A1 AU 2002212898 A1 AU2002212898 A1 AU 2002212898A1 AU 2002212898 A AU2002212898 A AU 2002212898A AU 1289802 A AU1289802 A AU 1289802A AU 2002212898 A1 AU2002212898 A1 AU 2002212898A1
Authority
AU
Australia
Prior art keywords
cell switching
priority signaling
signaling
priority
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002212898A
Inventor
Dan Horlin
Lars-Goran Petersen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of AU2002212898A1 publication Critical patent/AU2002212898A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/62—Queue scheduling characterised by scheduling criteria
    • H04L47/6215—Individual queue per QOS, rate or priority
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/62—Queue scheduling characterised by scheduling criteria
    • H04L47/6205—Arrangements for avoiding head of line blocking
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/101—Packet switching elements characterised by the switching fabric construction using crossbar or matrix
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
    • H04L49/105—ATM switching elements
    • H04L49/106—ATM switching elements using space switching, e.g. crossbar or matrix
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1553—Interconnection of ATM switching modules, e.g. ATM switching fabrics
    • H04L49/1576—Crossbar or matrix
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5651—Priority, marking, classes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H04L49/205—Quality of Service based
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/252—Store and forward routing
AU2002212898A 2000-11-15 2001-10-30 Priority signaling for cell switching Abandoned AU2002212898A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/712,123 2000-11-15
US09/712,123 US6993018B1 (en) 1999-08-03 2000-11-15 Priority signaling for cell switching
PCT/SE2001/002392 WO2002041591A2 (en) 2000-11-15 2001-10-30 Priority signaling for cell switching

Publications (1)

Publication Number Publication Date
AU2002212898A1 true AU2002212898A1 (en) 2002-05-27

Family

ID=24860849

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002212898A Abandoned AU2002212898A1 (en) 2000-11-15 2001-10-30 Priority signaling for cell switching

Country Status (3)

Country Link
US (1) US6993018B1 (en)
AU (1) AU2002212898A1 (en)
WO (1) WO2002041591A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60045624D1 (en) * 2000-10-03 2011-03-24 Gos Networks Ltd PACKET SEQUENCE CONTROL
US6904046B2 (en) * 2000-12-28 2005-06-07 International Business Machines Corporation Self-route multi-memory packet switch adapted to have an expandable number of input/output ports
US7130302B2 (en) * 2000-12-28 2006-10-31 International Business Machines Corporation Self-route expandable multi-memory packet switch
US7660731B2 (en) * 2002-04-06 2010-02-09 International Business Machines Corporation Method and apparatus for technology resource management
GB0208797D0 (en) * 2002-04-17 2002-05-29 Univ Cambridge Tech IP-Capable switch
WO2006072841A2 (en) * 2004-11-30 2006-07-13 Koninklijke Philips Electronics N.V. Efficient switching between prioritized tasks
US7408947B2 (en) * 2005-01-06 2008-08-05 Enigma Semiconductor Method and apparatus for scheduling packets and/or cells
US11611898B2 (en) * 2020-01-17 2023-03-21 Parallel Wireless, Inc. Slow eNodeB/HNB identification and impact mitigation

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1320257C (en) * 1989-04-20 1993-07-13 Ernst August Munter Method and apparatus for input-buffered asynchronous transfer mode switching
JPH03220836A (en) * 1990-01-25 1991-09-30 Nec Corp Asynchronous transmission mode exchange
JPH04281642A (en) * 1991-03-11 1992-10-07 Fujitsu Ltd Cross point type switch employing common buffer
WO1992019060A1 (en) * 1991-04-10 1992-10-29 N.V. Philips' Gloeilampenfabrieken Low delay or low loss cell switch for atm
MX9306994A (en) 1992-12-15 1994-06-30 Ericsson Telefon Ab L M FLOW CONTROL SYSTEM FOR PACKAGE SWITCHES.
US5509008A (en) * 1993-03-03 1996-04-16 Nippon Telegraph & Telephone Corp. High Speed ATM switch with simplified arbitration scheme and circuit configuration
US5546391A (en) * 1993-03-04 1996-08-13 International Business Machines Corporation Central shared queue based time multiplexed packet switch with deadlock avoidance
KR960003783B1 (en) 1993-11-06 1996-03-22 한국전기통신공사 Subscriber atm mux for interface to isdn
JPH07183888A (en) 1993-12-24 1995-07-21 Fujitsu Ltd Atm multiplexing control system
US5537400A (en) * 1994-04-15 1996-07-16 Dsc Communications Corporation Buffered crosspoint matrix for an asynchronous transfer mode switch and method of operation
JP2655481B2 (en) 1994-04-28 1997-09-17 日本電気株式会社 Priority control method in output buffer type ATM switch
US6151301A (en) * 1995-05-11 2000-11-21 Pmc-Sierra, Inc. ATM architecture and switching element
US5487061A (en) 1994-06-27 1996-01-23 Loral Fairchild Corporation System and method for providing multiple loss and service priorities
US5619500A (en) 1994-09-01 1997-04-08 Digital Link Corporation ATM network interface
EP0706297A1 (en) 1994-10-07 1996-04-10 International Business Machines Corporation Method for operating traffic congestion control in a data communication network and system for implementing said method
US5757771A (en) 1995-11-14 1998-05-26 Yurie Systems, Inc. Queue management to serve variable and constant bit rate traffic at multiple quality of service levels in a ATM switch
US5751709A (en) 1995-12-28 1998-05-12 Lucent Technologies Inc. Adaptive time slot scheduling apparatus and method for end-points in an ATM network
US5721833A (en) 1995-12-29 1998-02-24 Gte Laboratories Incorporated Push-out of low priority signals from switch buffers
US5862128A (en) 1995-12-29 1999-01-19 Gte Laboratories Inc Merged buffer signal switch
US5828653A (en) 1996-04-26 1998-10-27 Cascade Communications Corp. Quality of service priority subclasses
US5768257A (en) 1996-07-11 1998-06-16 Xylan Corporation Input buffering/output control for a digital traffic switch
JPH11154954A (en) * 1997-11-20 1999-06-08 Hitachi Ltd Atm switch
US6483831B1 (en) * 1997-12-19 2002-11-19 Telefonaktiebolaget Lm Ericsson (Publ) Asynchronous transfer mode switch
JP2002533997A (en) 1998-12-18 2002-10-08 テレフオンアクチーボラゲット エル エム エリクソン（パブル） Connection admission control based on bandwidth and buffer usage
US6556571B1 (en) * 1999-05-25 2003-04-29 Nec Usa, Inc. Fast round robin priority port scheduler for high capacity ATM switches
US6606326B1 (en) * 1999-07-02 2003-08-12 International Business Machines Corporation Packet switch employing dynamic transfer of data packet from central shared queue path to cross-point switching matrix path

Also Published As

Publication number Publication date
WO2002041591A3 (en) 2002-07-25
US6993018B1 (en) 2006-01-31
WO2002041591A2 (en) 2002-05-23

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