AU2002211851A1 - Incorporating local branch history when predicting multiple conditional branch outcomes - Google Patents

Incorporating local branch history when predicting multiple conditional branch outcomes

Info

Publication number
AU2002211851A1
AU2002211851A1 AU2002211851A AU1185102A AU2002211851A1 AU 2002211851 A1 AU2002211851 A1 AU 2002211851A1 AU 2002211851 A AU2002211851 A AU 2002211851A AU 1185102 A AU1185102 A AU 1185102A AU 2002211851 A1 AU2002211851 A1 AU 2002211851A1
Authority
AU
Australia
Prior art keywords
outcomes
multiple conditional
branch
predicting multiple
incorporating local
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002211851A
Other languages
English (en)
Inventor
Adam R. Talcott
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of AU2002211851A1 publication Critical patent/AU2002211851A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3848—Speculative instruction execution using hybrid branch prediction, e.g. selection between prediction techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
AU2002211851A 2000-10-06 2001-10-05 Incorporating local branch history when predicting multiple conditional branch outcomes Abandoned AU2002211851A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/680,840 2000-10-06
US09/680,840 US6738897B1 (en) 2000-10-06 2000-10-06 Incorporating local branch history when predicting multiple conditional branch outcomes
PCT/US2001/042478 WO2002029556A2 (fr) 2000-10-06 2001-10-05 Incorporation de donnees historiques de branchement local pour la prevision de resultats de branchements conditionnels multiples

Publications (1)

Publication Number Publication Date
AU2002211851A1 true AU2002211851A1 (en) 2002-04-15

Family

ID=24732735

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002211851A Abandoned AU2002211851A1 (en) 2000-10-06 2001-10-05 Incorporating local branch history when predicting multiple conditional branch outcomes

Country Status (3)

Country Link
US (1) US6738897B1 (fr)
AU (1) AU2002211851A1 (fr)
WO (1) WO2002029556A2 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6938151B2 (en) * 2002-06-04 2005-08-30 International Business Machines Corporation Hybrid branch prediction using a global selection counter and a prediction method comparison table
US7707398B2 (en) * 2007-11-13 2010-04-27 Applied Micro Circuits Corporation System and method for speculative global history prediction updating
US9489207B2 (en) * 2009-04-14 2016-11-08 International Business Machines Corporation Processor and method for partially flushing a dispatched instruction group including a mispredicted branch
US12008478B2 (en) 2019-10-18 2024-06-11 Unlearn.AI, Inc. Systems and methods for training generative models using summary statistics and other constraints
US11334361B2 (en) * 2020-03-02 2022-05-17 Arm Limited Shared pointer for local history records used by prediction circuitry
WO2024172853A1 (fr) * 2023-02-17 2024-08-22 Unlearn. Ai, Inc. Systèmes et procédés permettant une correction de prédiction de ligne de base
US11868900B1 (en) 2023-02-22 2024-01-09 Unlearn.AI, Inc. Systems and methods for training predictive models that ignore missing features

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5687360A (en) 1995-04-28 1997-11-11 Intel Corporation Branch predictor using multiple prediction heuristics and a heuristic identifier in the branch instruction
US5742805A (en) * 1996-02-15 1998-04-21 Fujitsu Ltd. Method and apparatus for a single history register based branch predictor in a superscalar microprocessor
US5864697A (en) 1996-06-28 1999-01-26 Texas Instruments Incorporated Microprocessor using combined actual and speculative branch history prediction
US6088793A (en) 1996-12-30 2000-07-11 Intel Corporation Method and apparatus for branch execution on a multiple-instruction-set-architecture microprocessor

Also Published As

Publication number Publication date
US6738897B1 (en) 2004-05-18
WO2002029556A3 (fr) 2002-08-29
WO2002029556A2 (fr) 2002-04-11

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