AU2001290880A1 - Methods and apparatuses for synchronizing data conversion of sonet framed data - Google Patents

Methods and apparatuses for synchronizing data conversion of sonet framed data

Info

Publication number
AU2001290880A1
AU2001290880A1 AU2001290880A AU9088001A AU2001290880A1 AU 2001290880 A1 AU2001290880 A1 AU 2001290880A1 AU 2001290880 A AU2001290880 A AU 2001290880A AU 9088001 A AU9088001 A AU 9088001A AU 2001290880 A1 AU2001290880 A1 AU 2001290880A1
Authority
AU
Australia
Prior art keywords
apparatuses
methods
data
synchronizing
data conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001290880A
Inventor
Srnivasarao Neelamraju
Arvind Bhaskar Patwardhan
Sunil Tomar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ciena Corp
Original Assignee
Ciena Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ciena Corp filed Critical Ciena Corp
Publication of AU2001290880A1 publication Critical patent/AU2001290880A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H04J3/0608—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0003—Switching fabrics, e.g. transport network, control network
    • H04J2203/0025—Peripheral units
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0003—Switching fabrics, e.g. transport network, control network
    • H04J2203/0026—Physical details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0028—Local loop
    • H04J2203/0039—Topology
    • H04J2203/0042—Ring
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0046—User Network Interface
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AU2001290880A 2000-09-14 2001-09-14 Methods and apparatuses for synchronizing data conversion of sonet framed data Abandoned AU2001290880A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/661,496 US6741615B1 (en) 2000-09-14 2000-09-14 Methods and apparatuses for synchronizing data conversion of sonet framed data
US09/661,496 2000-09-14
PCT/US2001/028668 WO2002023790A2 (en) 2000-09-14 2001-09-14 Methods and apparatuses for synchronizing data conversion of sonet framed data

Publications (1)

Publication Number Publication Date
AU2001290880A1 true AU2001290880A1 (en) 2002-03-26

Family

ID=24653847

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001290880A Abandoned AU2001290880A1 (en) 2000-09-14 2001-09-14 Methods and apparatuses for synchronizing data conversion of sonet framed data

Country Status (3)

Country Link
US (1) US6741615B1 (en)
AU (1) AU2001290880A1 (en)
WO (1) WO2002023790A2 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7139282B1 (en) * 2000-03-24 2006-11-21 Juniper Networks, Inc. Bandwidth division for packet processing
US7164698B1 (en) * 2000-03-24 2007-01-16 Juniper Networks, Inc. High-speed line interface for networking devices
US6944190B1 (en) * 2000-09-14 2005-09-13 Ciena Corporation Methods and apparatuses for serial transfer of SONET framed data between components of a SONET system
US7039073B1 (en) * 2001-02-22 2006-05-02 Cisco Technology, Inc. Bound mode technique for accommodating high-bandwidth data flow within an intermediate network node
US7215685B2 (en) * 2001-11-30 2007-05-08 Intel Corporation Frame aligning deframer
US6956847B2 (en) * 2003-06-19 2005-10-18 Cisco Technology, Inc. Multi-rate, multi-protocol, multi-port line interface for a multiservice switching platform
US7349411B2 (en) * 2003-07-30 2008-03-25 Bay Microsystems, Inc. Economically expansible switching network
US7624187B1 (en) 2003-09-19 2009-11-24 At&T Intellectual Property, I, L.P. Method, system and computer program product for providing Ethernet VLAN capacity requirement estimation
US7640359B1 (en) * 2003-09-19 2009-12-29 At&T Intellectual Property, I, L.P. Method, system and computer program product for facilitating the design and assignment of ethernet VLANs
US20050066036A1 (en) * 2003-09-19 2005-03-24 Neil Gilmartin Methods, systems and computer program products for facilitating the design and analysis of virtual networks based on total hub value
US7958208B2 (en) * 2004-09-22 2011-06-07 At&T Intellectual Property I, L.P. System and method for designing a customized switched metro Ethernet data network
JP5531655B2 (en) * 2010-02-08 2014-06-25 富士通株式会社 Serial data receiving circuit device and serial data receiving method
US8724758B2 (en) 2011-01-06 2014-05-13 Marvell World Trade Ltd. Power-efficient variable-clock-rate DIGRF interface
US8787471B1 (en) * 2011-02-15 2014-07-22 Marvell International Ltd. Alignment of DigRF4 lane

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4703421A (en) 1986-01-03 1987-10-27 Gte Communication Systems Corporation Ready line synchronization circuit for use in a duplicated computer system
JPH0775343B2 (en) 1986-02-14 1995-08-09 株式会社日立製作所 Synchronization detection circuit and method
JPH0787596B2 (en) 1986-06-20 1995-09-20 株式会社日立製作所 Signal processing circuit
JP2531272B2 (en) 1988-08-11 1996-09-04 日本電気株式会社 Frame synchronization control method
US5081654A (en) * 1989-05-12 1992-01-14 Alcatel Na Network Systems Corp. Parallel bit detection circuit for detecting frame synchronization information imbedded within a serial bit stream and method for carrying out same
US5052025A (en) * 1990-08-24 1991-09-24 At&T Bell Laboratories Synchronous digital signal to asynchronous digital signal desynchronizer
CA2124610C (en) 1994-05-30 1998-10-06 Charles Kevin Huscroft Integrated user network interface device
US6597214B1 (en) 2000-09-14 2003-07-22 Ciena Corporation Methods and apparatuses for jitter protection in an integrated circuit receiving an external synchronization signal
US6834049B1 (en) 2000-09-14 2004-12-21 Ciena Corporation Layouts for an integrated circuit to perform time and space switching of SONET framed data
US7039072B1 (en) 2000-09-14 2006-05-02 Ciena Corporation Methods and apparatuses for time and space switching of SONET framed data

Also Published As

Publication number Publication date
WO2002023790A2 (en) 2002-03-21
US6741615B1 (en) 2004-05-25
WO2002023790A3 (en) 2002-12-19

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