AU2001273651A1 - Method and apparatus for applying a protective over-coating to a ball-grid-array(bga) structure - Google Patents

Method and apparatus for applying a protective over-coating to a ball-grid-array(bga) structure

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Publication number
AU2001273651A1
AU2001273651A1 AU2001273651A AU7365101A AU2001273651A1 AU 2001273651 A1 AU2001273651 A1 AU 2001273651A1 AU 2001273651 A AU2001273651 A AU 2001273651A AU 7365101 A AU7365101 A AU 7365101A AU 2001273651 A1 AU2001273651 A1 AU 2001273651A1
Authority
AU
Australia
Prior art keywords
bga
grid
ball
array
coating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001273651A
Inventor
Victor Batinovich
E. C. Ong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Interconnect Solutions Inc
Original Assignee
Advanced Interconnect Solutions Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Interconnect Solutions Inc filed Critical Advanced Interconnect Solutions Inc
Publication of AU2001273651A1 publication Critical patent/AU2001273651A1/en
Abandoned legal-status Critical Current

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    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025—Abrading, e.g. grinding or sand blasting
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base
    • Y10T29/49149—Assembling terminal to base by metal fusion bonding

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
AU2001273651A 2000-07-03 2001-06-28 Method and apparatus for applying a protective over-coating to a ball-grid-array(bga) structure Abandoned AU2001273651A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/609,626 US20020064931A1 (en) 2000-07-03 2000-07-03 Method and apparatus for applying a protective over-coating to a ball-grid-array (BGA) structure
US09609626 2000-07-03
PCT/US2001/041200 WO2002003446A1 (en) 2000-07-03 2001-06-28 Method and apparatus for applying a protective over-coating to a ball-grid-array (bga) structure

Publications (1)

Publication Number Publication Date
AU2001273651A1 true AU2001273651A1 (en) 2002-01-14

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US (3) US20020064931A1 (en)
AU (1) AU2001273651A1 (en)
WO (1) WO2002003446A1 (en)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070245553A1 (en) * 1999-05-27 2007-10-25 Chong Fu C Fine pitch microfabricated spring contact structure & method
US7382142B2 (en) * 2000-05-23 2008-06-03 Nanonexus, Inc. High density interconnect system having rapid fabrication cycle
US6812718B1 (en) 1999-05-27 2004-11-02 Nanonexus, Inc. Massively parallel interface for electronic circuits
US7126220B2 (en) * 2002-03-18 2006-10-24 Nanonexus, Inc. Miniaturized contact spring
US7247035B2 (en) * 2000-06-20 2007-07-24 Nanonexus, Inc. Enhanced stress metal spring contactor
US6794751B2 (en) * 2001-06-29 2004-09-21 Intel Corporation Multi-purpose planarizing/back-grind/pre-underfill arrangements for bumped wafers and dies
KR20040044459A (en) * 2001-08-24 2004-05-28 나노넥서스, 인코포레이티드 Method and apparatus for producing uniform, isotropic stresses in a sputtered film
US6582983B1 (en) * 2002-07-12 2003-06-24 Keteca Singapore Singapore Method and wafer for maintaining ultra clean bonding pads on a wafer
US20050161814A1 (en) * 2002-12-27 2005-07-28 Fujitsu Limited Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus
US6921975B2 (en) 2003-04-18 2005-07-26 Freescale Semiconductor, Inc. Circuit device with at least partial packaging, exposed active surface and a voltage reference plane
US6838776B2 (en) * 2003-04-18 2005-01-04 Freescale Semiconductor, Inc. Circuit device with at least partial packaging and method for forming
US20050147489A1 (en) * 2003-12-24 2005-07-07 Tian-An Chen Wafer supporting system for semiconductor wafers
US7452662B2 (en) * 2004-04-23 2008-11-18 Hema-Quebec Method of expanding and differentiating cord blood cells by hyperthermic incubation
US20050242425A1 (en) * 2004-04-30 2005-11-03 Leal George R Semiconductor device with a protected active die region and method therefor
WO2008070673A2 (en) * 2006-12-04 2008-06-12 Nanonexus, Inc. Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies
DE102011002538A1 (en) * 2011-01-11 2012-07-12 Innovent E.V. Printed circuit board for mounting integrated circuit in ball grid array package used in electronic device, has solder bump that is embedded into plastic socket formed on contacting surface, in state exposing surface region of solder bump
DE102012208492A1 (en) * 2012-05-22 2013-11-28 Continental Teves Ag & Co. Ohg Dehnmessstreifenanordnung
US10460957B2 (en) * 2017-01-31 2019-10-29 Skyworks Solutions, Inc. Control of under-fill using an encapsulant for a dual-sided ball grid array package
US11172580B2 (en) * 2017-07-24 2021-11-09 Rosemount Aerospace Inc. BGA component masking dam and a method of manufacturing with the BGA component masking dam
CN110783212A (en) * 2019-09-27 2020-02-11 无锡天芯互联科技有限公司 Chip, preparation method thereof and electronic equipment

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2511289B2 (en) * 1988-03-30 1996-06-26 株式会社日立製作所 Semiconductor device
US6133534A (en) * 1991-11-29 2000-10-17 Hitachi Chemical Company, Ltd. Wiring board for electrical tests with bumps having polymeric coating
US5371654A (en) * 1992-10-19 1994-12-06 International Business Machines Corporation Three dimensional high performance interconnection package
US5810607A (en) * 1995-09-13 1998-09-22 International Business Machines Corporation Interconnector with contact pads having enhanced durability
SG45122A1 (en) * 1995-10-28 1998-01-16 Inst Of Microelectronics Low cost and highly reliable chip-sized package
KR0182073B1 (en) * 1995-12-22 1999-03-20 황인길 Semiconductor chip scale semiconductor package and manufacturing method thereof
JP3224731B2 (en) * 1996-02-05 2001-11-05 インターナショナル・ビジネス・マシーンズ・コーポレーション Method of forming layer having high density pattern
US6001671A (en) * 1996-04-18 1999-12-14 Tessera, Inc. Methods for manufacturing a semiconductor package having a sacrificial layer
JP3116273B2 (en) * 1996-04-26 2000-12-11 日本特殊陶業株式会社 Relay board, method of manufacturing the same, structure including board, relay board, and mounting board, connection body between board and relay board
US5971734A (en) * 1996-09-21 1999-10-26 Anam Semiconductor Inc. Mold for ball grid array semiconductor package
US6160705A (en) * 1997-05-09 2000-12-12 Texas Instruments Incorporated Ball grid array package and method using enhanced power and ground distribution circuitry
US5972734A (en) * 1997-09-17 1999-10-26 Lsi Logic Corporation Interposer for ball grid array (BGA) package
US6097087A (en) * 1997-10-31 2000-08-01 Micron Technology, Inc. Semiconductor package including flex circuit, interconnects and dense array external contacts
US6118179A (en) * 1999-08-27 2000-09-12 Micron Technology, Inc. Semiconductor component with external contact polymer support member and method of fabrication

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US20020001981A1 (en) 2002-01-03
US6347947B1 (en) 2002-02-19
US20020064931A1 (en) 2002-05-30
WO2002003446A1 (en) 2002-01-10

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