AU2001271278A1 - Method and apparatus for enhanced forward error correction in a network - Google Patents
Method and apparatus for enhanced forward error correction in a networkInfo
- Publication number
- AU2001271278A1 AU2001271278A1 AU2001271278A AU7127801A AU2001271278A1 AU 2001271278 A1 AU2001271278 A1 AU 2001271278A1 AU 2001271278 A AU2001271278 A AU 2001271278A AU 7127801 A AU7127801 A AU 7127801A AU 2001271278 A1 AU2001271278 A1 AU 2001271278A1
- Authority
- AU
- Australia
- Prior art keywords
- network
- error correction
- forward error
- enhanced forward
- enhanced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2909—Product codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2927—Decoding strategies
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2948—Iterative decoding
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0065—Serial concatenated codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/1515—Reed-Solomon codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L2001/0098—Unequal error protection
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US58774100A | 2000-06-05 | 2000-06-05 | |
US09587741 | 2000-06-05 | ||
PCT/US2001/017484 WO2001095503A1 (en) | 2000-06-05 | 2001-05-31 | Method and apparatus for enhanced forward error correction in a network |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001271278A1 true AU2001271278A1 (en) | 2001-12-17 |
Family
ID=24351013
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001271278A Abandoned AU2001271278A1 (en) | 2000-06-05 | 2001-05-31 | Method and apparatus for enhanced forward error correction in a network |
Country Status (3)
Country | Link |
---|---|
US (2) | US6622277B1 (en) |
AU (1) | AU2001271278A1 (en) |
WO (1) | WO2001095503A1 (en) |
Families Citing this family (100)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7046161B2 (en) | 1999-06-16 | 2006-05-16 | Universal Electronics Inc. | System and method for automatically setting up a universal remote control |
DE10038229B4 (en) | 1999-08-24 | 2011-06-09 | LG Electronics Inc., Kangnam-gu | Method and apparatus for rate adaptation in a mobile communication system |
JP2001274698A (en) * | 2000-03-24 | 2001-10-05 | Sony Corp | Encoding device, its method, recording medium for recording encoding program, decoding device, its method and recording medium for recording decoding program |
US6622277B1 (en) * | 2000-06-05 | 2003-09-16 | Tyco Telecommunications(Us)Inc. | Concatenated forward error correction decoder |
US7032154B2 (en) * | 2000-06-05 | 2006-04-18 | Tyco Telecommunications (Us) Inc. | Concatenated forward error correction decoder |
JP2002176408A (en) * | 2000-12-06 | 2002-06-21 | Nec Corp | Multi-frame multiplex transmission device |
US6829741B1 (en) * | 2001-07-27 | 2004-12-07 | Centillium Communications, Inc. | Forward error correction (FEC) based on SONET/SDH framing |
US20030165242A1 (en) * | 2001-11-19 | 2003-09-04 | Adrian Walker | Confusion encryption |
US7146553B2 (en) | 2001-11-21 | 2006-12-05 | Infinera Corporation | Error correction improvement for concatenated codes |
US7370120B2 (en) * | 2001-12-07 | 2008-05-06 | Propel Software Corporation | Method and system for reducing network latency in data communication |
JP3671906B2 (en) * | 2001-12-19 | 2005-07-13 | 日本電気株式会社 | Iterative concatenated code decoding circuit and encoding / decoding system using the same |
JP2003224542A (en) * | 2002-01-30 | 2003-08-08 | Kddi Submarine Cable Systems Inc | Method for expanding transmission capacity and optical transmitting terminal station device |
US7246294B2 (en) * | 2002-04-01 | 2007-07-17 | Intel Corporation | Method for iterative hard-decision forward error correction decoding |
US7231575B2 (en) * | 2002-04-01 | 2007-06-12 | Intel Corporation | Apparatus for iterative hard-decision forward error correction decoding |
EP1359672A1 (en) * | 2002-05-03 | 2003-11-05 | Siemens Aktiengesellschaft | Method for improving the performance of concatenated codes |
US7386779B2 (en) * | 2002-05-31 | 2008-06-10 | Lucent Technologies | Systems and methods for correcting errors in a received frame |
US20040001447A1 (en) * | 2002-06-28 | 2004-01-01 | Schafer David C. | Wireless communication airlink protocol |
US7388903B2 (en) * | 2002-09-18 | 2008-06-17 | Conexant, Inc. | Adaptive transmission rate and fragmentation threshold mechanism for local area networks |
WO2004095759A2 (en) * | 2003-04-22 | 2004-11-04 | Vitesse Semiconductor Corporation | Concatenated iterative forward error correction coding |
US7085282B2 (en) * | 2003-07-01 | 2006-08-01 | Thomson Licensing | Method and apparatus for providing forward error correction |
US7415658B2 (en) * | 2003-09-10 | 2008-08-19 | Intel Corporation | Forward error correction mapping and de-mapping techniques |
ATE541375T1 (en) * | 2003-11-12 | 2012-01-15 | Koninkl Philips Electronics Nv | DATA PACKET TRANSMISSION |
DE102004036383B4 (en) * | 2004-07-27 | 2006-06-14 | Siemens Ag | Coding and decoding methods, as well as coding and decoding devices |
US7516389B2 (en) * | 2004-11-04 | 2009-04-07 | Agere Systems Inc. | Concatenated iterative and algebraic coding |
US7646829B2 (en) * | 2004-12-23 | 2010-01-12 | Agere Systems, Inc. | Composite data detector and a method for detecting data |
US7467346B2 (en) * | 2005-08-18 | 2008-12-16 | Hitachi Global Storage Technologies Netherlands, B.V. | Decoding error correction codes using a modular single recursion implementation |
EP1811674A1 (en) * | 2006-01-23 | 2007-07-25 | Motorola, Inc. | Apparatus and methods for jointly decoding messages based on apriori knowledge of modified codeword transmission |
JP4662278B2 (en) * | 2006-04-28 | 2011-03-30 | 富士通株式会社 | Error correction apparatus, encoder, decoder, method, and information storage apparatus |
WO2007132457A2 (en) | 2006-05-12 | 2007-11-22 | Anobit Technologies Ltd. | Combined distortion estimation and error correction coding for memory devices |
US8050086B2 (en) | 2006-05-12 | 2011-11-01 | Anobit Technologies Ltd. | Distortion estimation and cancellation in memory devices |
US8239735B2 (en) | 2006-05-12 | 2012-08-07 | Apple Inc. | Memory Device with adaptive capacity |
WO2008053472A2 (en) | 2006-10-30 | 2008-05-08 | Anobit Technologies Ltd. | Reading memory cells using multiple thresholds |
JP4728203B2 (en) * | 2006-11-06 | 2011-07-20 | 富士通セミコンダクター株式会社 | Semiconductor circuit layout method, program, and design support system |
US8151163B2 (en) | 2006-12-03 | 2012-04-03 | Anobit Technologies Ltd. | Automatic defect management in memory devices |
US8627167B1 (en) | 2007-01-08 | 2014-01-07 | Marvell International Ltd. | Methods and apparatus for providing multi-layered coding for memory devices |
US8151166B2 (en) | 2007-01-24 | 2012-04-03 | Anobit Technologies Ltd. | Reduction of back pattern dependency effects in memory devices |
US8369141B2 (en) | 2007-03-12 | 2013-02-05 | Apple Inc. | Adaptive estimation of memory cell read thresholds |
US8234545B2 (en) * | 2007-05-12 | 2012-07-31 | Apple Inc. | Data storage with incremental redundancy |
US8429493B2 (en) * | 2007-05-12 | 2013-04-23 | Apple Inc. | Memory device with internal signap processing unit |
US8189581B2 (en) | 2007-06-20 | 2012-05-29 | Motorola Mobility, Inc. | Method, signal and apparatus for managing the transmission and receipt of broadcast channel information |
US8259497B2 (en) * | 2007-08-06 | 2012-09-04 | Apple Inc. | Programming schemes for multi-level analog memory cells |
US8065585B1 (en) * | 2007-08-30 | 2011-11-22 | L-3 Communications Corporation | High data throughput turbo product encoder |
US8136020B2 (en) * | 2007-09-19 | 2012-03-13 | Altera Canada Co. | Forward error correction CODEC |
US8174905B2 (en) | 2007-09-19 | 2012-05-08 | Anobit Technologies Ltd. | Programming orders for reducing distortion in arrays of multi-level analog memory cells |
US8527819B2 (en) | 2007-10-19 | 2013-09-03 | Apple Inc. | Data storage in analog memory cell arrays having erase failures |
KR101509836B1 (en) | 2007-11-13 | 2015-04-06 | 애플 인크. | Optimized selection of memory units in multi-unit memory devices |
KR20090050994A (en) * | 2007-11-16 | 2009-05-20 | 엘지전자 주식회사 | Digital broadcasting system and method of processing data in digital broadcasting system |
US8225181B2 (en) | 2007-11-30 | 2012-07-17 | Apple Inc. | Efficient re-read operations from memory devices |
US8209588B2 (en) | 2007-12-12 | 2012-06-26 | Anobit Technologies Ltd. | Efficient interference cancellation in analog memory cell arrays |
US8456905B2 (en) * | 2007-12-16 | 2013-06-04 | Apple Inc. | Efficient data storage in multi-plane memory devices |
US7899051B2 (en) | 2007-12-31 | 2011-03-01 | Motorola Mobility, Inc. | Broadcast channel signal, apparatus and method for transmitting and decoding broadcast channel information |
US8156398B2 (en) | 2008-02-05 | 2012-04-10 | Anobit Technologies Ltd. | Parameter estimation based on error correction code parity check equations |
US8266495B2 (en) * | 2008-02-20 | 2012-09-11 | Marvell World Trade Ltd. | Systems and methods for performing concatenated error correction |
US8230300B2 (en) | 2008-03-07 | 2012-07-24 | Apple Inc. | Efficient readout from analog memory cells using data compression |
US8400858B2 (en) | 2008-03-18 | 2013-03-19 | Apple Inc. | Memory device with reduced sense time readout |
US8493783B2 (en) | 2008-03-18 | 2013-07-23 | Apple Inc. | Memory device readout using multiple sense times |
TW200943794A (en) * | 2008-04-04 | 2009-10-16 | Nxp Bv | Method for efficient packet framing in a communication network |
US8185795B1 (en) | 2008-06-27 | 2012-05-22 | Emc Corporation | Side channel for forward error correction used with long-haul IP links |
US7995388B1 (en) | 2008-08-05 | 2011-08-09 | Anobit Technologies Ltd. | Data storage using modified voltages |
US8949684B1 (en) | 2008-09-02 | 2015-02-03 | Apple Inc. | Segmented data storage |
US8169825B1 (en) | 2008-09-02 | 2012-05-01 | Anobit Technologies Ltd. | Reliable data storage in analog memory cells subjected to long retention periods |
US8482978B1 (en) | 2008-09-14 | 2013-07-09 | Apple Inc. | Estimation of memory cell read thresholds by sampling inside programming level distribution intervals |
US8296630B2 (en) * | 2008-10-02 | 2012-10-23 | Fujitsu Limited | Multi-mode forward error correction |
US8239734B1 (en) | 2008-10-15 | 2012-08-07 | Apple Inc. | Efficient data storage in storage device arrays |
US8261159B1 (en) | 2008-10-30 | 2012-09-04 | Apple, Inc. | Data scrambling schemes for memory devices |
US8208304B2 (en) | 2008-11-16 | 2012-06-26 | Anobit Technologies Ltd. | Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N |
US8248831B2 (en) | 2008-12-31 | 2012-08-21 | Apple Inc. | Rejuvenation of analog memory cells |
US8397131B1 (en) | 2008-12-31 | 2013-03-12 | Apple Inc. | Efficient readout schemes for analog memory cell devices |
US8924661B1 (en) | 2009-01-18 | 2014-12-30 | Apple Inc. | Memory system including a controller and processors associated with memory devices |
US8228701B2 (en) * | 2009-03-01 | 2012-07-24 | Apple Inc. | Selective activation of programming schemes in analog memory cell arrays |
US8832354B2 (en) | 2009-03-25 | 2014-09-09 | Apple Inc. | Use of host system resources by memory controller |
US8259506B1 (en) | 2009-03-25 | 2012-09-04 | Apple Inc. | Database of memory read thresholds |
US8238157B1 (en) | 2009-04-12 | 2012-08-07 | Apple Inc. | Selective re-programming of analog memory cells |
JP5502363B2 (en) * | 2009-04-28 | 2014-05-28 | 三菱電機株式会社 | Optical transmission apparatus and optical transmission method |
US8479080B1 (en) | 2009-07-12 | 2013-07-02 | Apple Inc. | Adaptive over-provisioning in memory systems |
US8495465B1 (en) | 2009-10-15 | 2013-07-23 | Apple Inc. | Error correction coding over multiple memory pages |
US8392788B2 (en) * | 2009-11-24 | 2013-03-05 | Cortina Systems, Inc. | Transport network system with transparent transport and method of operation thereof |
US8677054B1 (en) | 2009-12-16 | 2014-03-18 | Apple Inc. | Memory management schemes for non-volatile memory devices |
US8694814B1 (en) | 2010-01-10 | 2014-04-08 | Apple Inc. | Reuse of host hibernation storage space by memory controller |
US8572311B1 (en) | 2010-01-11 | 2013-10-29 | Apple Inc. | Redundant data storage in multi-die memory systems |
US8694853B1 (en) | 2010-05-04 | 2014-04-08 | Apple Inc. | Read commands for reading interfering memory cells |
US8572423B1 (en) | 2010-06-22 | 2013-10-29 | Apple Inc. | Reducing peak current in memory systems |
US8595591B1 (en) | 2010-07-11 | 2013-11-26 | Apple Inc. | Interference-aware assignment of programming levels in analog memory cells |
US9104580B1 (en) | 2010-07-27 | 2015-08-11 | Apple Inc. | Cache memory for hybrid disk drives |
US8767459B1 (en) | 2010-07-31 | 2014-07-01 | Apple Inc. | Data storage in analog memory cells across word lines using a non-integer number of bits per cell |
US8856475B1 (en) | 2010-08-01 | 2014-10-07 | Apple Inc. | Efficient selection of memory blocks for compaction |
US8493781B1 (en) | 2010-08-12 | 2013-07-23 | Apple Inc. | Interference mitigation using individual word line erasure operations |
US8694854B1 (en) | 2010-08-17 | 2014-04-08 | Apple Inc. | Read threshold setting based on soft readout statistics |
US9021181B1 (en) | 2010-09-27 | 2015-04-28 | Apple Inc. | Memory management for unifying memory cell conditions by using maximum time intervals |
US8539303B2 (en) * | 2010-12-20 | 2013-09-17 | Intel Corporation | Low overhead error correcting code protection for stored information |
US20140302873A1 (en) * | 2011-10-28 | 2014-10-09 | Nokia Solutions And Networks Oy | Location verification in communication systems |
US9397786B2 (en) * | 2012-02-20 | 2016-07-19 | Tyco Electronics Subsea Communications Llc | System and method including modified bit-interleaved coded modulation |
US9160399B2 (en) | 2012-05-24 | 2015-10-13 | Massachusetts Institute Of Technology | System and apparatus for decoding tree-based messages |
US9973215B1 (en) | 2013-01-28 | 2018-05-15 | EMC IP Holding Company LLC | Controlled multipath data packet delivery with forward error correction |
US9270412B2 (en) * | 2013-06-26 | 2016-02-23 | Massachusetts Institute Of Technology | Permute codes, iterative ensembles, graphical hash codes, and puncturing optimization |
US9337935B2 (en) | 2013-09-08 | 2016-05-10 | Tyco Electronics Subsea Communications Llc | Coded modulation for small step-size variable spectral efficiency |
US9407398B2 (en) | 2013-09-08 | 2016-08-02 | Tyco Electronics Subsea Communications Llc | System and method using cascaded single partity check coding |
CN108667553B (en) | 2017-03-29 | 2021-07-09 | 华为技术有限公司 | Encoding method, decoding method, device and system |
US11556416B2 (en) | 2021-05-05 | 2023-01-17 | Apple Inc. | Controlling memory readout reliability and throughput by adjusting distance between read thresholds |
US11847342B2 (en) | 2021-07-28 | 2023-12-19 | Apple Inc. | Efficient transfer of hard data and confidence levels in reading a nonvolatile memory |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5392299A (en) * | 1992-01-15 | 1995-02-21 | E-Systems, Inc. | Triple orthogonally interleaed error correction system |
JPH08293802A (en) * | 1995-04-13 | 1996-11-05 | Internatl Business Mach Corp <Ibm> | Interleaving type error correction method |
US5719884A (en) * | 1995-07-27 | 1998-02-17 | Hewlett-Packard Company | Error correction method and apparatus based on two-dimensional code array with reduced redundancy |
US5812601A (en) * | 1996-11-15 | 1998-09-22 | Telefonaktiebolaget Lm Ericsson | Coding for higher-level modulation |
US6400393B1 (en) * | 1996-11-20 | 2002-06-04 | Samsung Electronics Co., Ltd. | DTV receiver with filter in I-F circuitry to suppress FM sound carrier of NTSC Co-channel interfering signal |
US6029264A (en) * | 1997-04-28 | 2000-02-22 | The Trustees Of Princeton University | System and method for error correcting a received data stream in a concatenated system |
CA2234006C (en) * | 1998-04-06 | 2004-10-19 | Wen Tong | Encoding and decoding methods and apparatus |
US6366776B1 (en) * | 1999-09-29 | 2002-04-02 | Trw Inc. | End-to-end transmission techniques for a processing satellite system |
US6622277B1 (en) * | 2000-06-05 | 2003-09-16 | Tyco Telecommunications(Us)Inc. | Concatenated forward error correction decoder |
US7032154B2 (en) * | 2000-06-05 | 2006-04-18 | Tyco Telecommunications (Us) Inc. | Concatenated forward error correction decoder |
-
2000
- 2000-06-07 US US09/589,215 patent/US6622277B1/en not_active Expired - Lifetime
-
2001
- 2001-05-31 WO PCT/US2001/017484 patent/WO2001095503A1/en active Application Filing
- 2001-05-31 AU AU2001271278A patent/AU2001271278A1/en not_active Abandoned
- 2001-11-14 US US09/993,082 patent/US20020056064A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US6622277B1 (en) | 2003-09-16 |
US20020056064A1 (en) | 2002-05-09 |
WO2001095503A1 (en) | 2001-12-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU2001271278A1 (en) | Method and apparatus for enhanced forward error correction in a network | |
AU2002228691A1 (en) | Apparatus and method for providing adaptive forward error correction | |
AU2001234950A1 (en) | Method and apparatus for correcting data using a redundant path | |
AU2001256607A1 (en) | Apparatus, and associated method, for communicating packet data in a network including a radio-link | |
AU2000279270A1 (en) | Method and apparatus for implementing a channel correction in a digital data link | |
AU5504801A (en) | Method and apparatus for quality assurance in a multimedia communications environment | |
AU2001245742A1 (en) | Method and apparatus for providing streaming media in a communication network | |
AU2001224723A1 (en) | Method and apparatus for automatically selecting a rule | |
AU2001273324A1 (en) | Method and apparatus for communicating order entries in a network environment | |
AU2001246525A1 (en) | System and method for data burst communications in a cdma network | |
AU2001272020A1 (en) | Method and apparatus for adaptive rate selection in a communication system | |
AU2003237801A1 (en) | Method and system for configuration and download in a restricted architecture network | |
AU8281198A (en) | Method and apparatus for correcting aspect ratio in a camera graphical user interface | |
AU2002224448A1 (en) | Method and apparatus for large payload distribution in a network | |
AU5935900A (en) | Method and apparatus for fast reroute in a connection-oriented network | |
AU5273300A (en) | Method and apparatus for a multi-gigabit ethernet architecture | |
AU4272201A (en) | Method and apparatus for covering a stent | |
AU2001249632A1 (en) | Apparatus and method for providing separate forward dedicated and shared controlchannels in a communications system | |
AU2003216262A1 (en) | A method and an apparatus for registering a user in a group communication network | |
AU2001296795A1 (en) | Method for maintaining reservation state in a network router | |
AU5261200A (en) | A method for error reduction in lithography | |
AU2001261461A1 (en) | Method and system for conducting a contest using a network | |
AU7310000A (en) | Method for measuring delay parameters in a network | |
AU2003301936A1 (en) | System and method for enabling multicast in a cdma network | |
AU2353200A (en) | Method and apparatus for replacing lost pstn data in a packet network |