AU2001265329A1 - Enhanced channel adapter - Google Patents

Enhanced channel adapter

Info

Publication number
AU2001265329A1
AU2001265329A1 AU2001265329A AU6532901A AU2001265329A1 AU 2001265329 A1 AU2001265329 A1 AU 2001265329A1 AU 2001265329 A AU2001265329 A AU 2001265329A AU 6532901 A AU6532901 A AU 6532901A AU 2001265329 A1 AU2001265329 A1 AU 2001265329A1
Authority
AU
Australia
Prior art keywords
channel adapter
enhanced channel
enhanced
adapter
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001265329A
Inventor
Jens Haulund
Graham G. Yarbrough
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inrange Technologies Corp
Original Assignee
Inrange Technologies Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inrange Technologies Corp filed Critical Inrange Technologies Corp
Publication of AU2001265329A1 publication Critical patent/AU2001265329A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
AU2001265329A 2000-06-02 2001-06-01 Enhanced channel adapter Abandoned AU2001265329A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US20905400P 2000-06-02 2000-06-02
US60209054 2000-06-02
PCT/US2001/017903 WO2001095098A2 (en) 2000-06-02 2001-06-01 Enhanced channel adapter

Publications (1)

Publication Number Publication Date
AU2001265329A1 true AU2001265329A1 (en) 2001-12-17

Family

ID=22777128

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001265329A Abandoned AU2001265329A1 (en) 2000-06-02 2001-06-01 Enhanced channel adapter

Country Status (4)

Country Link
US (1) US20020002631A1 (en)
AU (1) AU2001265329A1 (en)
CA (1) CA2381191A1 (en)
WO (1) WO2001095098A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030110265A1 (en) * 2001-12-07 2003-06-12 Inrange Technologies Inc. Method and apparatus for providing a virtual shared device
US7200546B1 (en) * 2002-09-05 2007-04-03 Ultera Systems, Inc. Tape storage emulator
US7643983B2 (en) * 2003-03-28 2010-01-05 Hewlett-Packard Development Company, L.P. Data storage system emulation
JP4788124B2 (en) * 2004-09-16 2011-10-05 株式会社日立製作所 Data processing system
JP2007226385A (en) * 2006-02-22 2007-09-06 Fujitsu Ltd Message queue control program and message queuing system
US11683676B2 (en) * 2021-08-20 2023-06-20 Motorola Solutions. Inc. Method and apparatus for providing multi-tier factory reset of a converged communication device

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4402046A (en) * 1978-12-21 1983-08-30 Intel Corporation Interprocessor communication system
US4543627A (en) * 1981-12-14 1985-09-24 At&T Bell Laboratories Internal communication arrangement for a multiprocessor system
US4667287A (en) * 1982-10-28 1987-05-19 Tandem Computers Incorporated Multiprocessor multisystem communications network
US4942700A (en) * 1988-10-27 1990-07-24 Charles Hoberman Reversibly expandable doubly-curved truss structure
JPH02310664A (en) * 1989-05-26 1990-12-26 Hitachi Ltd Communication system using shared memory
EP0444376B1 (en) * 1990-02-27 1996-11-06 International Business Machines Corporation Mechanism for passing messages between several processors coupled through a shared intelligent memory
WO1993018461A1 (en) * 1992-03-09 1993-09-16 Auspex Systems, Inc. High-performance non-volatile ram protected write cache accelerator system
GB2276739A (en) * 1993-03-30 1994-10-05 Ibm System for storing persistent and non-persistent queued data.
US5664195A (en) * 1993-04-07 1997-09-02 Sequoia Systems, Inc. Method and apparatus for dynamic installation of a driver on a computer system
US5892895A (en) * 1997-01-28 1999-04-06 Tandem Computers Incorporated Method an apparatus for tolerance of lost timer ticks during recovery of a multi-processor system
US6141701A (en) * 1997-03-13 2000-10-31 Whitney; Mark M. System for, and method of, off-loading network transactions from a mainframe to an intelligent input/output device, including off-loading message queuing facilities
US6035347A (en) * 1997-12-19 2000-03-07 International Business Machines Corporation Secure store implementation on common platform storage subsystem (CPSS) by storing write data in non-volatile buffer
IL125056A0 (en) * 1998-06-22 1999-01-26 Yelin Dov Instant automatic resumption of computer operation following power failure or power down
US6513097B1 (en) * 1999-03-03 2003-01-28 International Business Machines Corporation Method and system for maintaining information about modified data in cache in a storage system for use during a system failure
US6640313B1 (en) * 1999-12-21 2003-10-28 Intel Corporation Microprocessor with high-reliability operating mode

Also Published As

Publication number Publication date
WO2001095098A2 (en) 2001-12-13
US20020002631A1 (en) 2002-01-03
CA2381191A1 (en) 2001-12-13
WO2001095098A3 (en) 2002-05-30

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