AU2001263390A1 - Interface for sonet lines of different capacities - Google Patents

Interface for sonet lines of different capacities

Info

Publication number
AU2001263390A1
AU2001263390A1 AU2001263390A AU6339001A AU2001263390A1 AU 2001263390 A1 AU2001263390 A1 AU 2001263390A1 AU 2001263390 A AU2001263390 A AU 2001263390A AU 6339001 A AU6339001 A AU 6339001A AU 2001263390 A1 AU2001263390 A1 AU 2001263390A1
Authority
AU
Australia
Prior art keywords
framer
ports
packets
link
slower
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001263390A
Inventor
Jeff Cuppett
David Skirmont
Russ Tuck
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pluris Inc
Original Assignee
Pluris Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pluris Inc filed Critical Pluris Inc
Publication of AU2001263390A1 publication Critical patent/AU2001263390A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
    • H04J3/1617—Synchronous digital hierarchy [SDH] or SONET carrying packets or ATM cells
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/50—Routing or path finding of packets in data switching networks using label swapping, e.g. multi-protocol label switch [MPLS]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/60—Router architectures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/24—Traffic characterised by specific attributes, e.g. priority or QoS
    • H04L47/2441—Traffic characterised by specific attributes, e.g. priority or QoS relying on flow classification, e.g. using integrated services [IntServ]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40—Network security protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0073—Services, e.g. multimedia, GOS, QOS
    • H04J2203/0082—Interaction of SDH with non-ATM protocols
    • H04J2203/0085—Support of Ethernet
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3018—Input queuing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3027—Output queuing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/351—Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
    • H04L49/352—Gigabit ethernet switching [GBPS]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S370/00—Multiplex communications
    • Y10S370/901—Wide area network
    • Y10S370/902—Packet switching
    • Y10S370/903—Osi compliant network
    • Y10S370/907—Synchronous optical network, SONET
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S379/00—Telephonic communications
    • Y10S379/90—Internet, e.g. Internet phone, webphone, internet-based telephony

Abstract

A line card for a data packet router interfaces to a high-speed standard data link, and has a first portion interfacing to the router and having a plurality of slower ports, and a second portion having a framer compatible with and coupled to the data link. The framer is coupled through an ingress and an egress data path between the framer and the slower ports, each with separate ingress buffers and egress buffers for each port. An interface control circuit controls data packet transfers between the slower ports and the framer in both directions. In a preferred embodiment a function is used by the control circuit to map packets from the link to the ports, using keys extracted from the incoming packets. For an IP packet the key is the source address, destination address (SA/DA)pair, which constrains packets for same IP conversations to be routed by the same path.
AU2001263390A 2000-06-14 2001-05-22 Interface for sonet lines of different capacities Abandoned AU2001263390A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09594300 2000-06-14
US09/594,300 US6385209B1 (en) 2000-06-14 2000-06-14 Method and apparatus for mapping data packets between lines of differing capacity at a router interface
PCT/US2001/016708 WO2001097471A1 (en) 2000-06-14 2001-05-22 Interface for sonet lines of different capacities

Publications (1)

Publication Number Publication Date
AU2001263390A1 true AU2001263390A1 (en) 2001-12-24

Family

ID=24378338

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001263390A Abandoned AU2001263390A1 (en) 2000-06-14 2001-05-22 Interface for sonet lines of different capacities

Country Status (5)

Country Link
US (2) US6385209B1 (en)
EP (1) EP1305915B1 (en)
AT (1) ATE515862T1 (en)
AU (1) AU2001263390A1 (en)
WO (1) WO2001097471A1 (en)

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US6553005B1 (en) 2000-07-26 2003-04-22 Pluris, Inc. Method and apparatus for load apportionment among physical interfaces in data routers
US7388831B2 (en) * 2000-07-26 2008-06-17 Pluris, Inc. Method and apparatus for bond management according to hierarchy
US6765916B1 (en) 2000-12-30 2004-07-20 Redback Networks Inc. Method and apparatus for processing of multiple protocols within data transmission signals
US7200107B2 (en) * 2001-01-06 2007-04-03 Mindspeed Technologies, Inc. Method and apparatus for lossless switchover in a redundant switch fabric
US6950446B2 (en) 2001-03-31 2005-09-27 Redback Networks Inc. Method and apparatus for simultaneously sync hunting signals
US6959008B2 (en) * 2001-03-31 2005-10-25 Redback Networks Inc. Alignment of TDM-based signals for packet transmission using framed and unframed operations
US7593432B2 (en) * 2001-03-31 2009-09-22 Redback Networks Inc. Method and apparatus for deframing signals
US6941381B2 (en) * 2001-03-31 2005-09-06 Redback Networks Inc. Method and apparatus for sync hunting signals
US7139288B2 (en) * 2001-08-03 2006-11-21 Agere Systems Inc. Protocol-independent packet delineation for backplane architecture
US6763394B2 (en) * 2001-08-22 2004-07-13 Pluris, Inc. Virtual egress packet classification at ingress
US7324539B1 (en) 2001-11-28 2008-01-29 Redback Networks Inc. Method and apparatus for processing channelized and unchannelized data within a signal
US7075951B1 (en) * 2001-11-29 2006-07-11 Redback Networks Inc. Method and apparatus for the operation of a storage unit in a network element
US7327748B2 (en) * 2002-01-28 2008-02-05 Alcatel Lucent Enterprise switching device and method
US7206862B2 (en) * 2002-04-24 2007-04-17 Microsoft Corporation Method and apparatus for efficiently matching responses to requests previously passed by a network node
US7362771B1 (en) * 2002-05-30 2008-04-22 Marvell International Ltd. Reduced latency FIFO
US7733900B2 (en) * 2002-10-21 2010-06-08 Broadcom Corporation Multi-service ethernet-over-sonet silicon platform
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Also Published As

Publication number Publication date
EP1305915A4 (en) 2007-09-12
ATE515862T1 (en) 2011-07-15
US6839359B2 (en) 2005-01-04
EP1305915A1 (en) 2003-05-02
US6385209B1 (en) 2002-05-07
US20020136208A1 (en) 2002-09-26
WO2001097471A1 (en) 2001-12-20
EP1305915B1 (en) 2011-07-06

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