AU2001261214A1 - Method and system for decoding 8-bit/10-bit data using limited width decoders - Google Patents
Method and system for decoding 8-bit/10-bit data using limited width decodersInfo
- Publication number
- AU2001261214A1 AU2001261214A1 AU2001261214A AU6121401A AU2001261214A1 AU 2001261214 A1 AU2001261214 A1 AU 2001261214A1 AU 2001261214 A AU2001261214 A AU 2001261214A AU 6121401 A AU6121401 A AU 6121401A AU 2001261214 A1 AU2001261214 A1 AU 2001261214A1
- Authority
- AU
- Australia
- Prior art keywords
- bit
- decoding
- limited width
- bit data
- decoders
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
- H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
- H03M5/145—Conversion to or from block codes or representations thereof
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US20272200P | 2000-05-08 | 2000-05-08 | |
US60202722 | 2000-05-08 | ||
US09662075 | 2000-09-14 | ||
US09/662,075 US6392570B1 (en) | 2000-05-08 | 2000-09-14 | Method and system for decoding 8-bit/10-bit data using limited width decoders |
PCT/US2001/014580 WO2001086898A2 (en) | 2000-05-08 | 2001-05-04 | Method and system for decoding 8-bit/10-bit data using limited width decoders |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001261214A1 true AU2001261214A1 (en) | 2001-11-20 |
Family
ID=26897965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001261214A Abandoned AU2001261214A1 (en) | 2000-05-08 | 2001-05-04 | Method and system for decoding 8-bit/10-bit data using limited width decoders |
Country Status (3)
Country | Link |
---|---|
US (1) | US6392570B1 (en) |
AU (1) | AU2001261214A1 (en) |
WO (1) | WO2001086898A2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8498368B1 (en) | 2001-04-11 | 2013-07-30 | Qualcomm Incorporated | Method and system for optimizing gain changes by identifying modulation type and rate |
US7027530B2 (en) * | 2001-04-11 | 2006-04-11 | Atheros Communications, Inc. | Method and apparatus for maximizing receiver performance utilizing mid-packet gain changes |
US7154299B2 (en) * | 2002-04-05 | 2006-12-26 | Stmicroelectronics Pvt. Ltd. | Architecture for programmable logic device |
KR100520302B1 (en) * | 2002-11-23 | 2005-10-13 | 한국전자통신연구원 | Apparatus and method for 8B/10B code-group validity check |
US7463651B2 (en) * | 2003-02-12 | 2008-12-09 | Broadcom Corporation | Method and system for exploiting spare link bandwidth in a multilane communication channel |
US9166584B1 (en) * | 2014-06-09 | 2015-10-20 | Xilinx, Inc. | Current-encoded signaling |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4486739A (en) | 1982-06-30 | 1984-12-04 | International Business Machines Corporation | Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code |
GB8912471D0 (en) | 1989-05-31 | 1989-07-19 | Int Computers Ltd | Data transmission code |
US5144304A (en) | 1989-07-17 | 1992-09-01 | Digital Equipment Corporation | Data and forward error control coding techniques for digital signals |
KR0170681B1 (en) * | 1995-08-09 | 1999-03-20 | 김광호 | Encoding and decoding apparatus for rll code data |
JP3306271B2 (en) * | 1995-08-23 | 2002-07-24 | 三洋電機株式会社 | Encoding method, encoding circuit, and decoding circuit |
GB9614561D0 (en) | 1996-07-11 | 1996-09-04 | 4Links Ltd | Communication system with improved code |
US6195764B1 (en) * | 1997-01-30 | 2001-02-27 | Fujitsu Network Communications, Inc. | Data encoder/decoder for a high speed serial link |
US6295010B1 (en) * | 1998-07-02 | 2001-09-25 | Seagate Technology, Llc | 8B/10B encoder system and method |
-
2000
- 2000-09-14 US US09/662,075 patent/US6392570B1/en not_active Expired - Lifetime
-
2001
- 2001-05-04 WO PCT/US2001/014580 patent/WO2001086898A2/en active Application Filing
- 2001-05-04 AU AU2001261214A patent/AU2001261214A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO2001086898A2 (en) | 2001-11-15 |
US6392570B1 (en) | 2002-05-21 |
WO2001086898A3 (en) | 2002-05-30 |
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