AU2001258545A1 - Distributed processing multi-processor computer - Google Patents

Distributed processing multi-processor computer

Info

Publication number
AU2001258545A1
AU2001258545A1 AU2001258545A AU5854501A AU2001258545A1 AU 2001258545 A1 AU2001258545 A1 AU 2001258545A1 AU 2001258545 A AU2001258545 A AU 2001258545A AU 5854501 A AU5854501 A AU 5854501A AU 2001258545 A1 AU2001258545 A1 AU 2001258545A1
Authority
AU
Australia
Prior art keywords
distributed processing
processor computer
processing multi
processor
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001258545A
Inventor
Neale Bremner Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB0011977A external-priority patent/GB0011977D0/en
Priority claimed from GB0011972A external-priority patent/GB0011972D0/en
Application filed by Individual filed Critical Individual
Publication of AU2001258545A1 publication Critical patent/AU2001258545A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/30—Creation or generation of source code
    • G06F8/31—Programming languages or programming paradigms
    • G06F8/314—Parallel programming languages
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/10—Protocols in which an application is distributed across nodes in the network

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multi Processors (AREA)
AU2001258545A 2000-05-19 2001-05-18 Distributed processing multi-processor computer Abandoned AU2001258545A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
GB0011972 2000-05-19
GB0011977A GB0011977D0 (en) 2000-05-19 2000-05-19 Distributed processing
GB0011977 2000-05-19
GB0011972A GB0011972D0 (en) 2000-05-19 2000-05-19 Multiprocessor computer
PCT/GB2001/002166 WO2001088712A2 (en) 2000-05-19 2001-05-18 Distributed processing multi-processor computer

Publications (1)

Publication Number Publication Date
AU2001258545A1 true AU2001258545A1 (en) 2001-11-26

Family

ID=26244298

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001258545A Abandoned AU2001258545A1 (en) 2000-05-19 2001-05-18 Distributed processing multi-processor computer

Country Status (5)

Country Link
US (1) US20030182376A1 (en)
EP (1) EP1290560A2 (en)
AU (1) AU2001258545A1 (en)
CA (1) CA2409042A1 (en)
WO (1) WO2001088712A2 (en)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0015276D0 (en) 2000-06-23 2000-08-16 Smith Neale B Coherence free cache
JP3892829B2 (en) * 2003-06-27 2007-03-14 株式会社東芝 Information processing system and memory management method
US8924654B1 (en) * 2003-08-18 2014-12-30 Cray Inc. Multistreamed processor vector packing method and apparatus
US7784054B2 (en) * 2004-04-14 2010-08-24 Wm Software Inc. Systems and methods for CPU throttling utilizing processes
US20060072563A1 (en) * 2004-10-05 2006-04-06 Regnier Greg J Packet processing
US9176741B2 (en) * 2005-08-29 2015-11-03 Invention Science Fund I, Llc Method and apparatus for segmented sequential storage
US20090006663A1 (en) * 2007-06-27 2009-01-01 Archer Charles J Direct Memory Access ('DMA') Engine Assisted Local Reduction
US8422402B2 (en) 2008-04-01 2013-04-16 International Business Machines Corporation Broadcasting a message in a parallel computer
US8375197B2 (en) * 2008-05-21 2013-02-12 International Business Machines Corporation Performing an allreduce operation on a plurality of compute nodes of a parallel computer
US8484440B2 (en) 2008-05-21 2013-07-09 International Business Machines Corporation Performing an allreduce operation on a plurality of compute nodes of a parallel computer
US8281053B2 (en) 2008-07-21 2012-10-02 International Business Machines Corporation Performing an all-to-all data exchange on a plurality of data buffers by performing swap operations
US8565089B2 (en) * 2010-03-29 2013-10-22 International Business Machines Corporation Performing a scatterv operation on a hierarchical tree network optimized for collective operations
US8332460B2 (en) * 2010-04-14 2012-12-11 International Business Machines Corporation Performing a local reduction operation on a parallel computer
US9424087B2 (en) 2010-04-29 2016-08-23 International Business Machines Corporation Optimizing collective operations
US8346883B2 (en) 2010-05-19 2013-01-01 International Business Machines Corporation Effecting hardware acceleration of broadcast operations in a parallel computer
US8489859B2 (en) 2010-05-28 2013-07-16 International Business Machines Corporation Performing a deterministic reduction operation in a compute node organized into a branched tree topology
US8949577B2 (en) 2010-05-28 2015-02-03 International Business Machines Corporation Performing a deterministic reduction operation in a parallel computer
US8661424B2 (en) 2010-09-02 2014-02-25 Honeywell International Inc. Auto-generation of concurrent code for multi-core applications
US8776081B2 (en) 2010-09-14 2014-07-08 International Business Machines Corporation Send-side matching of data communications messages
US8566841B2 (en) 2010-11-10 2013-10-22 International Business Machines Corporation Processing communications events in parallel active messaging interface by awakening thread from wait state
US8893083B2 (en) 2011-08-09 2014-11-18 International Business Machines Coporation Collective operation protocol selection in a parallel computer
US8667501B2 (en) 2011-08-10 2014-03-04 International Business Machines Corporation Performing a local barrier operation
US8910178B2 (en) 2011-08-10 2014-12-09 International Business Machines Corporation Performing a global barrier operation in a parallel computer
US9495135B2 (en) 2012-02-09 2016-11-15 International Business Machines Corporation Developing collective operations for a parallel computer

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5134711A (en) * 1988-05-13 1992-07-28 At&T Bell Laboratories Computer with intelligent memory system
AU615084B2 (en) * 1988-12-15 1991-09-19 Pixar Method and apparatus for memory routing scheme
DE3853162T2 (en) * 1988-12-23 1995-08-17 Ibm Common intelligent memory for the mutual connection of distributed microprocessors.
US5761731A (en) * 1995-01-13 1998-06-02 Digital Equipment Corporation Method and apparatus for performing atomic transactions in a shared memory multi processor system

Also Published As

Publication number Publication date
US20030182376A1 (en) 2003-09-25
EP1290560A2 (en) 2003-03-12
CA2409042A1 (en) 2001-11-22
WO2001088712A2 (en) 2001-11-22
WO2001088712A3 (en) 2002-06-27

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