AU2001253553A1 - Method and apparatus for controlling deposition parameters based on polysilicon grain size feedback - Google Patents

Method and apparatus for controlling deposition parameters based on polysilicon grain size feedback

Info

Publication number
AU2001253553A1
AU2001253553A1 AU2001253553A AU5355301A AU2001253553A1 AU 2001253553 A1 AU2001253553 A1 AU 2001253553A1 AU 2001253553 A AU2001253553 A AU 2001253553A AU 5355301 A AU5355301 A AU 5355301A AU 2001253553 A1 AU2001253553 A1 AU 2001253553A1
Authority
AU
Australia
Prior art keywords
grain size
parameters based
deposition parameters
polysilicon grain
controlling deposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001253553A
Inventor
Jeremy Lansford
Thomas S. Sonderman
Anthony J. Toprac
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of AU2001253553A1 publication Critical patent/AU2001253553A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Vapour Deposition (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
AU2001253553A 2000-05-24 2001-04-16 Method and apparatus for controlling deposition parameters based on polysilicon grain size feedback Abandoned AU2001253553A1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US09/577,769 2000-05-24
US09/577,769 US6511898B1 (en) 2000-05-24 2000-05-24 Method for controlling deposition parameters based on polysilicon grain size feedback
US09577769 2000-05-24
PCT/US2001/012358 WO2001091177A2 (en) 2000-05-24 2001-04-16 Method and apparatus for controlling deposition parameters based on polysilicon grain size feedback

Publications (1)

Publication Number Publication Date
AU2001253553A1 true AU2001253553A1 (en) 2001-12-03

Family

ID=24310074

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001253553A Abandoned AU2001253553A1 (en) 2000-05-24 2001-04-16 Method and apparatus for controlling deposition parameters based on polysilicon grain size feedback

Country Status (5)

Country Link
US (1) US6511898B1 (en)
EP (1) EP1290727A2 (en)
JP (1) JP2003534661A (en)
AU (1) AU2001253553A1 (en)
WO (1) WO2001091177A2 (en)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7102763B2 (en) * 2000-07-08 2006-09-05 Semitool, Inc. Methods and apparatus for processing microelectronic workpieces using metrology
US6747734B1 (en) * 2000-07-08 2004-06-08 Semitool, Inc. Apparatus and method for processing a microelectronic workpiece using metrology
US6428673B1 (en) * 2000-07-08 2002-08-06 Semitool, Inc. Apparatus and method for electrochemical processing of a microelectronic workpiece, capable of modifying processing based on metrology
KR100979071B1 (en) * 2002-02-22 2010-08-31 에이저 시스템즈 인크 Chemical mechanical polishing of dual orientation polycrystalline materials
US20040108212A1 (en) * 2002-12-06 2004-06-10 Lyndon Graham Apparatus and methods for transferring heat during chemical processing of microelectronic workpieces
US20050031188A1 (en) * 2003-08-10 2005-02-10 Luu Victor Van Systems and methods for characterizing a sample
US6980873B2 (en) 2004-04-23 2005-12-27 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for real-time fault detection, classification, and correction in a semiconductor manufacturing environment
US7437404B2 (en) * 2004-05-20 2008-10-14 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for improving equipment communication in semiconductor manufacturing equipment
US7292906B2 (en) * 2004-07-14 2007-11-06 Tokyo Electron Limited Formula-based run-to-run control
US8352062B2 (en) * 2009-03-11 2013-01-08 Taiwan Semiconductor Manufacturing Company, Ltd. Advanced process control for gate profile control
JP5766647B2 (en) * 2012-03-28 2015-08-19 東京エレクトロン株式会社 Heat treatment system, heat treatment method, and program
WO2019195470A1 (en) * 2018-04-06 2019-10-10 Ivaldi Group, Inc. Acoustic-energy based material deposition and repair
JP6959190B2 (en) * 2018-07-24 2021-11-02 旭化成エレクトロニクス株式会社 Learning processing equipment, learning processing method, compound semiconductor manufacturing method and program
JP6959191B2 (en) 2018-07-25 2021-11-02 旭化成エレクトロニクス株式会社 Learning processing equipment, learning processing method, compound semiconductor manufacturing method, and program
CN110993523A (en) * 2019-12-26 2020-04-10 上海华虹宏力半导体制造有限公司 Method for measuring grain size
US20230166329A1 (en) * 2021-12-01 2023-06-01 Keng Hsu Intermittent material-tool interaction control enabling continuous deposition of solid metal voxels using local high-frequency, small-displacement oscillatory strain energy

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4332833A (en) * 1980-02-29 1982-06-01 Bell Telephone Laboratories, Incorporated Method for optical monitoring in materials fabrication
US4571685A (en) 1982-06-23 1986-02-18 Nec Corporation Production system for manufacturing semiconductor devices
JPS6094757A (en) * 1983-10-20 1985-05-27 Fujitsu Ltd Resistor
JPH03229456A (en) * 1990-02-05 1991-10-11 Rohm Co Ltd Manufacture of semiconductor device
US5270222A (en) 1990-12-31 1993-12-14 Texas Instruments Incorporated Method and apparatus for semiconductor device fabrication diagnosis and prognosis
JP3209789B2 (en) * 1992-03-28 2001-09-17 鐘淵化学工業株式会社 Polysilicon thin film deposit and its manufacturing method
JPH05308053A (en) * 1992-04-08 1993-11-19 Nec Corp Chemical vapor growth equipment
JPH0758031A (en) * 1993-08-18 1995-03-03 Nissin Electric Co Ltd Ion deposition thin film forming apparatus and film forming method using the same
US5633177A (en) * 1993-11-08 1997-05-27 Advanced Micro Devices, Inc. Method for producing a semiconductor gate conductor having an impurity migration barrier
JPH0817743A (en) * 1994-06-29 1996-01-19 Sony Corp Cvd device and film formation method using it
US5835225A (en) 1994-11-30 1998-11-10 Micron Technology, Inc. Surface properties detection by reflectance metrology
JP2956833B2 (en) 1997-02-19 1999-10-04 日本電気株式会社 Evaluation method of polycrystalline silicon film
JP3658213B2 (en) * 1998-11-19 2005-06-08 富士通株式会社 Manufacturing method of semiconductor device
US6160300A (en) * 1999-01-26 2000-12-12 Advanced Micro Devices, Inc. Multi-layer gate conductor having a diffusion barrier in the bottom layer

Also Published As

Publication number Publication date
US6511898B1 (en) 2003-01-28
JP2003534661A (en) 2003-11-18
WO2001091177A2 (en) 2001-11-29
EP1290727A2 (en) 2003-03-12
WO2001091177A3 (en) 2002-07-18

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