AU2001249691A1 - Power management system for a random number generator - Google Patents

Power management system for a random number generator

Info

Publication number
AU2001249691A1
AU2001249691A1 AU2001249691A AU4969101A AU2001249691A1 AU 2001249691 A1 AU2001249691 A1 AU 2001249691A1 AU 2001249691 A AU2001249691 A AU 2001249691A AU 4969101 A AU4969101 A AU 4969101A AU 2001249691 A1 AU2001249691 A1 AU 2001249691A1
Authority
AU
Australia
Prior art keywords
random number
management system
power management
number generator
generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001249691A
Inventor
David A. Ward
Steven E. Wells
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU2001249691A1 publication Critical patent/AU2001249691A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58Random or pseudo-random number generators
    • G06F7/588Random number generators, i.e. based on natural stochastic processes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
  • Power Sources (AREA)
AU2001249691A 2000-04-21 2001-03-29 Power management system for a random number generator Abandoned AU2001249691A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/553,925 US6728893B1 (en) 2000-04-21 2000-04-21 Power management system for a random number generator
US09553925 2000-04-21
PCT/US2001/010385 WO2001082056A2 (en) 2000-04-21 2001-03-29 Power management system for a random number generator

Publications (1)

Publication Number Publication Date
AU2001249691A1 true AU2001249691A1 (en) 2001-11-07

Family

ID=24211340

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001249691A Abandoned AU2001249691A1 (en) 2000-04-21 2001-03-29 Power management system for a random number generator

Country Status (4)

Country Link
US (1) US6728893B1 (en)
AU (1) AU2001249691A1 (en)
TW (1) TW550499B (en)
WO (1) WO2001082056A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006087806A1 (en) * 2005-02-18 2006-08-24 Fujitsu Limited Clock generating apparatus, clock generating method, clock generating program, operation testing apparatus, operation testing method, and operation testing program
DE102008018727B4 (en) * 2008-04-14 2017-12-21 Rohde & Schwarz Sit Gmbh Random number generator
US8489660B2 (en) 2009-06-26 2013-07-16 Intel Corporation Digital random number generator using partially entropic data
US9454653B1 (en) 2014-05-14 2016-09-27 Brian Penny Technologies for enhancing computer security
US10594687B2 (en) 2013-05-14 2020-03-17 Kara Partners Llc Technologies for enhancing computer security
US10057250B2 (en) 2013-05-14 2018-08-21 Kara Partners Llc Technologies for enhancing computer security
US9223503B2 (en) * 2013-09-27 2015-12-29 Intel Corporation Generating random numbers utilizing entropic nature of NAND flash memory medium
TWI634478B (en) * 2017-07-18 2018-09-01 展達通訊股份有限公司 True random number generation system and true random number generating method thereof

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2962468D1 (en) 1978-10-27 1982-05-19 Gretag Ag Enciphering and deciphering apparatus
US4379420A (en) * 1981-10-19 1983-04-12 Kawai Musical Instrument Mfg. Co., Ltd. Adaptive strum keying for a keyboard electronic musical instrument
US4810975A (en) 1987-08-10 1989-03-07 Dallas Semiconductor Corp. Random number generator using sampled output of variable frequency oscillator
US5025387A (en) * 1988-09-06 1991-06-18 Motorola, Inc. Power saving arrangement for a clocked digital circuit
JPH0328911A (en) * 1989-06-26 1991-02-07 Mitsubishi Electric Corp Microprocessor
JPH06236694A (en) 1991-05-07 1994-08-23 Intel Corp High-voltage level conversion circuit
IL99660A0 (en) * 1991-10-07 1992-08-18 Ibm Israel Random number generator
US5251165A (en) 1992-04-09 1993-10-05 James Iii J Colin Two phase random number generator
US5377200A (en) * 1992-08-27 1994-12-27 Advanced Micro Devices, Inc. Power saving feature for components having built-in testing logic
US5603036A (en) 1993-02-19 1997-02-11 Intel Corporation Power management system for components used in battery powered applications
US5784002A (en) * 1995-05-02 1998-07-21 Mobile Telecommunication Technologies Low-power random digit generator
US5706218A (en) 1996-05-15 1998-01-06 Intel Corporation Random number generator
JP2842389B2 (en) 1996-07-11 1999-01-06 日本電気株式会社 Random number generator
US5805907A (en) * 1996-10-04 1998-09-08 International Business Machines Corporation System and method for reducing power consumption in an electronic circuit
US6233531B1 (en) * 1997-12-19 2001-05-15 Advanced Micro Devices, Inc. Apparatus and method for monitoring the performance of a microprocessor
US6064223A (en) * 1998-07-08 2000-05-16 Intel Corporation Low leakage circuit configuration for MOSFET circuits
US6046616A (en) 1998-08-07 2000-04-04 Tritech Microelectronics, Ltd. Two dimensional random pulse generator
FR2802661B1 (en) 1999-12-21 2003-10-31 Bull Sa HIGH SPEED RANDOM NUMBER GENERATOR
US6280045B1 (en) * 2000-01-06 2001-08-28 E. S. Originals, Inc. Lighted footwear module with random time delay

Also Published As

Publication number Publication date
TW550499B (en) 2003-09-01
WO2001082056A2 (en) 2001-11-01
WO2001082056A3 (en) 2002-03-21
US6728893B1 (en) 2004-04-27

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