AU2001236858A1 - Distribution, processing, and reconstruction of variable-sized images using multiple processor arrays - Google Patents

Distribution, processing, and reconstruction of variable-sized images using multiple processor arrays

Info

Publication number
AU2001236858A1
AU2001236858A1 AU2001236858A AU3685801A AU2001236858A1 AU 2001236858 A1 AU2001236858 A1 AU 2001236858A1 AU 2001236858 A AU2001236858 A AU 2001236858A AU 3685801 A AU3685801 A AU 3685801A AU 2001236858 A1 AU2001236858 A1 AU 2001236858A1
Authority
AU
Australia
Prior art keywords
reconstruction
variable
distribution
processing
multiple processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001236858A
Inventor
Howard Del Fava
Kevin Dennis
Carl Morris
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teranex Inc
Original Assignee
Teranex Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teranex Inc filed Critical Teranex Inc
Publication of AU2001236858A1 publication Critical patent/AU2001236858A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Image Processing (AREA)
AU2001236858A 2000-02-23 2001-02-12 Distribution, processing, and reconstruction of variable-sized images using multiple processor arrays Abandoned AU2001236858A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09511697 2000-02-23
US09/511,697 US6425026B1 (en) 2000-02-23 2000-02-23 Distribution, processing, and reconstruction of variable-sized images using multiple processor arrays
PCT/US2001/004292 WO2001063426A1 (en) 2000-02-23 2001-02-12 Distribution, processing, and reconstruction of variable-sized images using multiple processor arrays

Publications (1)

Publication Number Publication Date
AU2001236858A1 true AU2001236858A1 (en) 2001-09-03

Family

ID=24036046

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001236858A Abandoned AU2001236858A1 (en) 2000-02-23 2001-02-12 Distribution, processing, and reconstruction of variable-sized images using multiple processor arrays

Country Status (3)

Country Link
US (1) US6425026B1 (en)
AU (1) AU2001236858A1 (en)
WO (1) WO2001063426A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2002336576A1 (en) * 2001-09-17 2003-04-01 Morpho Technologies Digital signal processor for wireless baseband processing
JP2003274123A (en) * 2002-03-08 2003-09-26 Internatl Business Mach Corp <Ibm> Image processing method and image processing system
WO2006026265A2 (en) * 2004-08-31 2006-03-09 Silicon Optix Method and apparatus for reading and writing pixel-aligned subframes in a frame buffer
US20080114478A1 (en) * 2006-11-09 2008-05-15 David Wu Method and System for Multi-Channel PCM Audio Grouping in Hardware
EP2688211A4 (en) * 2011-07-29 2014-08-06 Huawei Tech Co Ltd Interleaving and de-interleaving method, interleaver and de-interleaver
US20140204005A1 (en) * 2013-01-18 2014-07-24 Nvidia Corporation System, method, and computer program product for distributed processing of overlapping portions of pixels
EP2991031A1 (en) * 2014-08-27 2016-03-02 Thomson Licensing Method and apparatus for accelerated pixel-recursive processing of an image signal
JP2017191145A (en) * 2016-04-11 2017-10-19 キヤノン株式会社 Image processing apparatus, image processing method, and program

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4870704A (en) * 1984-10-31 1989-09-26 Flexible Computer Corporation Multicomputer digital processing system
US5093920A (en) 1987-06-25 1992-03-03 At&T Bell Laboratories Programmable processing elements interconnected by a communication network including field operation unit for performing field operations
US5128658A (en) 1988-06-27 1992-07-07 Digital Equipment Corporation Pixel data formatting
US5619066A (en) * 1990-05-15 1997-04-08 Dallas Semiconductor Corporation Memory for an electronic token
EP0485690B1 (en) * 1990-11-13 1999-05-26 International Business Machines Corporation Parallel associative processor system
US5388220A (en) 1991-03-19 1995-02-07 Matsushita Electric Industrial Co., Ltd. Parallel processing system and data transfer method which reduces bus contention by use of data relays having plurality of buffers
KR970006027B1 (en) 1992-08-17 1997-04-23 마쯔시다 덴기 산교 가부시끼가이샤 Data transfer control unit using a control circuit to achieve high speed data transfer
US6073185A (en) 1993-08-27 2000-06-06 Teranex, Inc. Parallel data processor
US5812202A (en) 1995-03-24 1998-09-22 Minerva Systems, Inc. Method and apparatus performing inverse telecine for MPEG coding
US6173388B1 (en) 1998-04-09 2001-01-09 Teranex Inc. Directly accessing local memories of array processors for improved real-time corner turning processing

Also Published As

Publication number Publication date
US6425026B1 (en) 2002-07-23
WO2001063426A1 (en) 2001-08-30

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