AU2001229760A1 - Hardware and software co-simulation including simulating the cache of a target processor - Google Patents

Hardware and software co-simulation including simulating the cache of a target processor

Info

Publication number
AU2001229760A1
AU2001229760A1 AU2001229760A AU2976001A AU2001229760A1 AU 2001229760 A1 AU2001229760 A1 AU 2001229760A1 AU 2001229760 A AU2001229760 A AU 2001229760A AU 2976001 A AU2976001 A AU 2976001A AU 2001229760 A1 AU2001229760 A1 AU 2001229760A1
Authority
AU
Australia
Prior art keywords
cache
hardware
software
target processor
simulation including
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001229760A
Inventor
Ricky L. K. Chan
King Yin Cheung
Graham R. Hellestrand
Ming Chi Kam
James R. Torossian
Foo Ngok Yong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vast Systems Technology Corp
Original Assignee
Vast Systems Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vast Systems Technology Corp filed Critical Vast Systems Technology Corp
Publication of AU2001229760A1 publication Critical patent/AU2001229760A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/261Functional testing by simulating additional hardware, e.g. fault simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/10Processors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/30Creation or generation of source code
AU2001229760A 2000-01-26 2001-01-24 Hardware and software co-simulation including simulating the cache of a target processor Abandoned AU2001229760A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/491,390 US6263302B1 (en) 1999-10-29 2000-01-26 Hardware and software co-simulation including simulating the cache of a target processor
US09491390 2000-01-26
PCT/US2001/002407 WO2001055847A1 (en) 2000-01-26 2001-01-24 Hardware and software co-simulation including simulating the cache of a target processor

Publications (1)

Publication Number Publication Date
AU2001229760A1 true AU2001229760A1 (en) 2001-08-07

Family

ID=23952007

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001229760A Abandoned AU2001229760A1 (en) 2000-01-26 2001-01-24 Hardware and software co-simulation including simulating the cache of a target processor

Country Status (3)

Country Link
US (2) US6263302B1 (en)
AU (1) AU2001229760A1 (en)
WO (1) WO2001055847A1 (en)

Families Citing this family (181)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6567934B1 (en) * 1999-10-21 2003-05-20 Motorola, Inc. Method and apparatus for verifying multiprocessing design in a unit simulation environment
US6751583B1 (en) * 1999-10-29 2004-06-15 Vast Systems Technology Corporation Hardware and software co-simulation including simulating a target processor using binary translation
US6973417B1 (en) * 1999-11-05 2005-12-06 Metrowerks Corporation Method and system for simulating execution of a target program in a simulated target system
US6304972B1 (en) * 2000-01-03 2001-10-16 Massachusetts Institute Of Technology Secure software system and related techniques
US20030200070A1 (en) * 2000-03-01 2003-10-23 Elliott Mark S. Simulation of uncharacterized hardware
US6871341B1 (en) * 2000-03-24 2005-03-22 Intel Corporation Adaptive scheduling of function cells in dynamic reconfigurable logic
US6467075B1 (en) * 2000-03-24 2002-10-15 Nec Corporation Resolution of dynamic memory allocation/deallocation and pointers
JP2001273340A (en) * 2000-03-27 2001-10-05 Toshiba Corp Method and device for verifying design of microprocessor and pipeline simulator generation device
USRE42227E1 (en) * 2000-03-28 2011-03-15 Ionipas Transfer Company, Llc Apparatus and method for connecting hardware to a circuit simulation
US7266490B2 (en) * 2000-12-28 2007-09-04 Robert Marc Zeidman Apparatus and method for connecting hardware to a circuit simulation
US8160863B2 (en) * 2000-03-28 2012-04-17 Ionipas Transfer Company, Llc System and method for connecting a logic circuit simulation to a network
US7072820B1 (en) * 2000-06-02 2006-07-04 Brian Bailey Accessing state information in a hardware/software co-simulation
WO2001095161A2 (en) * 2000-06-02 2001-12-13 Virtio Corporation Method and system for virtual prototyping
US7412369B1 (en) * 2000-06-09 2008-08-12 Stmicroelectronics, Inc. System and method for designing and optimizing the memory of an embedded processing system
US6615317B2 (en) * 2000-07-07 2003-09-02 Fitech Laboratories, Inc. Methods and systems for providing a highly scalable synchronous data cache
US6701518B1 (en) * 2000-08-03 2004-03-02 Hewlett-Packard Development Company, L.P. System and method for enabling efficient processing of a program that includes assertion instructions
US6970816B1 (en) * 2000-08-14 2005-11-29 International Business Machines Corporation Method and system for efficiently generating parameterized bus transactions
US7249351B1 (en) * 2000-08-30 2007-07-24 Broadcom Corporation System and method for preparing software for execution in a dynamically configurable hardware environment
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US8160864B1 (en) 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US6751759B1 (en) * 2000-11-03 2004-06-15 Freescale Semiconductor, Inc. Method and apparatus for pipeline hazard detection
US6772370B1 (en) * 2000-11-03 2004-08-03 Freescale Semiconductor, Inc. Method and apparatus for generation of pipeline hazard test sequences
US7905900B2 (en) * 2003-01-30 2011-03-15 Integrated Vascular Systems, Inc. Clip applier and methods of use
US20070016396A9 (en) * 2000-12-28 2007-01-18 Zeidman Robert M Apparatus and method for connecting a hardware emulator to a computer peripheral
US7035911B2 (en) 2001-01-12 2006-04-25 Epicrealm, Licensing Llc Method and system for community data caching
US7188145B2 (en) 2001-01-12 2007-03-06 Epicrealm Licensing Llc Method and system for dynamic distributed data caching
JP2002297898A (en) * 2001-03-30 2002-10-11 Ibm Japan Ltd Data processing system, accounting system, and data processing system operating method
US6952664B1 (en) * 2001-04-13 2005-10-04 Oracle International Corp. System and method for predicting cache performance
DE10137574B4 (en) * 2001-07-31 2006-01-19 Infineon Technologies Ag Method, computer program and data processing system for processing network topologies
GB0121990D0 (en) * 2001-09-11 2001-10-31 Beach Solutions Ltd Emulation system & method
JP2003085001A (en) * 2001-09-12 2003-03-20 Toshiba Corp Source code debugger, debugging method and debugging program
JP2003131902A (en) * 2001-10-24 2003-05-09 Toshiba Corp Software debugger, system-level debugger, debug method and debug program
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US7526422B1 (en) 2001-11-13 2009-04-28 Cypress Semiconductor Corporation System and a method for checking lock-step consistency between an in circuit emulation and a microcontroller
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US7774190B1 (en) 2001-11-19 2010-08-10 Cypress Semiconductor Corporation Sleep and stall in an in-circuit emulation system
US7770113B1 (en) 2001-11-19 2010-08-03 Cypress Semiconductor Corporation System and method for dynamically generating a configuration datasheet
US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
US8069405B1 (en) 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
US7627462B2 (en) * 2001-11-27 2009-12-01 Arm Limited Hardware simulation using a test scenario manager
US7216342B2 (en) * 2002-03-14 2007-05-08 Stmicroelectronics Limited Code generation
US6996802B2 (en) 2002-03-18 2006-02-07 Sun Microsystems, Inc. Method and apparatus for deployment of high integrity software using initialization order and calling order constraints
US7010783B2 (en) * 2002-03-18 2006-03-07 Sun Microsystems, Inc. Method and apparatus for deployment of high integrity software using reduced dynamic memory allocation
US7181737B2 (en) * 2002-03-18 2007-02-20 Sun Microsystems, Inc. Method and apparatus for deployment of high integrity software using static procedure return addresses
US8103497B1 (en) 2002-03-28 2012-01-24 Cypress Semiconductor Corporation External interface for event architecture
US7206732B2 (en) * 2002-04-04 2007-04-17 International Business Machines Corporation C-API instrumentation for HDL models
US7194400B2 (en) * 2002-04-04 2007-03-20 International Business Machines Corporation Method and system for reducing storage and transmission requirements for simulation results
US7373290B2 (en) 2002-04-04 2008-05-13 International Business Machines Corporation Method and system for reducing storage requirements of simulation data via keyword restrictions
US7203633B2 (en) * 2002-04-04 2007-04-10 International Business Machines Corporation Method and system for selectively storing and retrieving simulation data utilizing keywords
US7099813B2 (en) * 2002-04-09 2006-08-29 Arm Limited Simulating program instruction execution and hardware device operation
US20030218765A1 (en) * 2002-04-26 2003-11-27 Tsutomu Ohishi Apparatus for controlling launch of application and method
US7082390B2 (en) * 2002-04-30 2006-07-25 Lsi Logic Corporation Advanced storage controller
US7308608B1 (en) 2002-05-01 2007-12-11 Cypress Semiconductor Corporation Reconfigurable testing system and method
US7761845B1 (en) 2002-09-09 2010-07-20 Cypress Semiconductor Corporation Method for parameterizing a user module
US7953588B2 (en) * 2002-09-17 2011-05-31 International Business Machines Corporation Method and system for efficient emulation of multiprocessor address translation on a multiprocessor host
US7496494B2 (en) 2002-09-17 2009-02-24 International Business Machines Corporation Method and system for multiprocessor emulation on a multiprocessor host system
US9043194B2 (en) 2002-09-17 2015-05-26 International Business Machines Corporation Method and system for efficient emulation of multiprocessor memory consistency
US8108843B2 (en) 2002-09-17 2012-01-31 International Business Machines Corporation Hybrid mechanism for more efficient emulation and method therefor
US20040083089A1 (en) * 2002-10-24 2004-04-29 International Business Machines Corporation System and method for coordinated operation or a plurality of computers
DE10255768B3 (en) * 2002-11-28 2004-06-24 Infineon Technologies Ag Configurable logic block device using field programmable gate array technology and incorporating look-up tables
US7308393B2 (en) * 2003-04-22 2007-12-11 Delphi Technologies, Inc. Hardware and software co-simulation using estimated adjustable timing annotations
US6981232B1 (en) * 2003-05-23 2005-12-27 Xilinx, Inc. Method and system for integrating a program and a processor into an application specific processor
US20040243379A1 (en) * 2003-05-29 2004-12-02 Dominic Paulraj Ideal machine simulator with infinite resources to predict processor design performance
US20050108562A1 (en) * 2003-06-18 2005-05-19 Khazan Roger I. Technique for detecting executable malicious code using a combination of static and dynamic analyses
US7194658B2 (en) * 2003-07-24 2007-03-20 Sonics, Inc. Various methods and apparatuses for interfacing of a protocol monitor to protocol checkers and functional checkers
US7237064B2 (en) * 2003-10-10 2007-06-26 Intel Corporation Method and apparatus for feedback-based management of combined heap and compiled code caches
US20050138515A1 (en) * 2003-11-05 2005-06-23 Hyduke Stanley M. Method and apparatus for co-verification of digital designs
US7409602B2 (en) * 2003-11-12 2008-08-05 Lsi Corporation Methodology for debugging RTL simulations of processor based system on chip
US7328429B2 (en) * 2003-11-13 2008-02-05 Intel Corporation Instruction operand tracing for software debug
US7236918B2 (en) * 2003-12-31 2007-06-26 International Business Machines Corporation Method and system for selective compilation of instrumentation entities into a simulation model of a digital design
US7536288B2 (en) 2003-12-31 2009-05-19 International Business Machines Corporation Method, system and program product supporting user tracing in a simulator
US7295049B1 (en) 2004-03-25 2007-11-13 Cypress Semiconductor Corporation Method and circuit for rapid alignment of signals
US7231632B2 (en) * 2004-04-16 2007-06-12 Apple Computer, Inc. System for reducing the number of programs necessary to render an image
US8704837B2 (en) * 2004-04-16 2014-04-22 Apple Inc. High-level program interface for graphics operations
US8134561B2 (en) 2004-04-16 2012-03-13 Apple Inc. System for optimizing graphics operations
KR20050112890A (en) * 2004-05-28 2005-12-01 삼성전자주식회사 Instruction decoding method in an architenctural simulator
US7278122B2 (en) * 2004-06-24 2007-10-02 Ftl Systems, Inc. Hardware/software design tool and language specification mechanism enabling efficient technology retargeting and optimization
US8517329B2 (en) * 2004-07-26 2013-08-27 3M Innovative Properties Company Easel stand mountable display board
US8082531B2 (en) * 2004-08-13 2011-12-20 Cypress Semiconductor Corporation Method and an apparatus to design a processing system using a graphical user interface
US8069436B2 (en) 2004-08-13 2011-11-29 Cypress Semiconductor Corporation Providing hardware independence to automate code generation of processing device firmware
US8286125B2 (en) 2004-08-13 2012-10-09 Cypress Semiconductor Corporation Model for a hardware device-independent method of defining embedded firmware for programmable systems
US7571188B1 (en) * 2004-09-23 2009-08-04 Sun Microsystems, Inc. Cache abstraction for modeling database performance
US20060089826A1 (en) * 2004-10-21 2006-04-27 International Business Machines Corporation Method, system and program product for defining and recording minimum and maximum count events of a simulation
US7392169B2 (en) * 2004-10-21 2008-06-24 International Business Machines Corporation Method, system and program product for defining and recording minimum and maximum event counts of a simulation utilizing a high level language
US8219379B2 (en) * 2004-11-29 2012-07-10 Arm Limited System, method and computer program product for testing software
US7454325B2 (en) * 2004-12-07 2008-11-18 International Business Machines Corporation Method, system and program product for defining and recording threshold-qualified count events of a simulation by testcases
US7260800B1 (en) * 2004-12-10 2007-08-21 Synopsys, Inc. Method and apparatus for initial state extraction
WO2006072082A2 (en) * 2004-12-30 2006-07-06 Vast Systems Technology Corporation Clock simulation system and method
US20060174067A1 (en) * 2005-02-03 2006-08-03 Craig Soules Method of caching data
US7332976B1 (en) 2005-02-04 2008-02-19 Cypress Semiconductor Corporation Poly-phase frequency synthesis oscillator
US7404160B2 (en) * 2005-02-18 2008-07-22 Quickturn Design Systems Inc. Method and system for hardware based reporting of assertion information for emulation and hardware acceleration
US7478027B2 (en) * 2005-03-30 2009-01-13 International Business Machines Corporation Systems, methods, and media for simulation of integrated hardware and software designs
US7657875B2 (en) * 2005-04-12 2010-02-02 International Business Machines Corporation System and method for collecting a plurality of metrics in a single profiling run of computer code
US7640539B2 (en) * 2005-04-12 2009-12-29 International Business Machines Corporation Instruction profiling using multiple metrics
US7400183B1 (en) 2005-05-05 2008-07-15 Cypress Semiconductor Corporation Voltage controlled oscillator delay cell and method
US7509619B1 (en) * 2005-06-22 2009-03-24 Xilinx, Inc. Auto generation of a multi-staged processing pipeline hardware implementation for designs captured in high level languages
US8089461B2 (en) 2005-06-23 2012-01-03 Cypress Semiconductor Corporation Touch wake for electronic devices
JP4346587B2 (en) * 2005-07-27 2009-10-21 富士通株式会社 System simulation method
US7552043B2 (en) * 2005-09-15 2009-06-23 International Business Machines Corporation Method, system and program product for selectively removing instrumentation logic from a simulation model
US7447619B2 (en) * 2005-09-29 2008-11-04 International Business Machines Corporation Apparatus and method for composite behavioral modeling for multiple-sourced integrated circuits
US8085067B1 (en) 2005-12-21 2011-12-27 Cypress Semiconductor Corporation Differential-to-single ended signal converter circuit and method
US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
US7836435B2 (en) * 2006-03-31 2010-11-16 Intel Corporation Checking for memory access collisions in a multi-processor architecture
US7930683B2 (en) * 2006-03-31 2011-04-19 Sap Ag Test automation method for software programs
US7711537B2 (en) * 2006-05-03 2010-05-04 International Business Machines Corporation Signals for simulation result viewing
US7493248B2 (en) * 2006-05-08 2009-02-17 International Business Machines Corporation Method, system and program product supporting phase events in a simulation model of a digital system
WO2008013968A2 (en) 2006-07-28 2008-01-31 Vast Systems Technology Corporation Virtual processor generation model for co-simulation
WO2008091575A2 (en) 2007-01-22 2008-07-31 Vast Systems Technology Corporation Method and system for modeling a bus for a system design incorporating one or more programmable processors
US7912694B2 (en) * 2007-01-30 2011-03-22 International Business Machines Corporation Print events in the simulation of a digital system
US8040266B2 (en) 2007-04-17 2011-10-18 Cypress Semiconductor Corporation Programmable sigma-delta analog-to-digital converter
US8092083B2 (en) 2007-04-17 2012-01-10 Cypress Semiconductor Corporation Temperature sensor with digital bandgap
US9564902B2 (en) 2007-04-17 2017-02-07 Cypress Semiconductor Corporation Dynamically configurable and re-configurable data path
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8130025B2 (en) 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US7737724B2 (en) 2007-04-17 2010-06-15 Cypress Semiconductor Corporation Universal digital block interconnection and channel routing
US8516025B2 (en) 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
US8245202B2 (en) * 2007-04-18 2012-08-14 Sony Computer Entertainment Inc. Processor emulation using speculative forward translation
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US8065653B1 (en) 2007-04-25 2011-11-22 Cypress Semiconductor Corporation Configuration of programmable IC design elements
US8266575B1 (en) 2007-04-25 2012-09-11 Cypress Semiconductor Corporation Systems and methods for dynamically reconfiguring a programmable system on a chip
JP5109143B2 (en) * 2007-06-28 2012-12-26 株式会社東芝 Verification apparatus and verification method
US20090055155A1 (en) * 2007-08-20 2009-02-26 Russell Klein Simulating execution of software programs in electronic circuit designs
US8049569B1 (en) 2007-09-05 2011-11-01 Cypress Semiconductor Corporation Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes
US7925489B2 (en) * 2007-10-31 2011-04-12 International Business Machines Corporation Defining and recording threshold-qualified count events of a simulation by testcases
US8050902B2 (en) 2007-10-31 2011-11-01 International Business Machines Corporation Reporting temporal information regarding count events of a simulation
US8060356B2 (en) 2007-12-19 2011-11-15 Sony Computer Entertainment Inc. Processor emulation using fragment level translation
US8584102B2 (en) * 2007-12-27 2013-11-12 Microsoft Corporation Creating and using deltas to modify existing computer code
US8265917B1 (en) * 2008-02-25 2012-09-11 Xilinx, Inc. Co-simulation synchronization interface for IC modeling
US8495574B2 (en) * 2008-06-16 2013-07-23 International Business Machines Corporation Code coverage tool
JP5151722B2 (en) * 2008-06-20 2013-02-27 ソニー株式会社 Data processing apparatus and method, and program
US20110119044A1 (en) * 2008-08-26 2011-05-19 Anthony Dean Walker Processor simulation using instruction traces or markups
US20100057427A1 (en) * 2008-09-04 2010-03-04 Anthony Dean Walker Simulated processor execution using branch override
GB0817514D0 (en) * 2008-09-24 2008-10-29 Symbian Software Ltd Method and apparatus for updating a computing device
US8453080B2 (en) * 2008-12-16 2013-05-28 International Business Machines Corporation Model build in the presence of a non-binding reference
US8160857B2 (en) 2008-12-16 2012-04-17 International Business Machines Corporation Selective compilation of a simulation model in view of unavailable higher level signals
US20100205400A1 (en) * 2009-02-09 2010-08-12 Unisys Corporation Executing routines between an emulated operating system and a host operating system
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system
JP5237223B2 (en) * 2009-08-20 2013-07-17 三菱電機株式会社 Supervisory control device
US20110093252A1 (en) * 2009-10-16 2011-04-21 Shi-Wu Lo Method of accurately simulating a target machine on a simulator
US20110239193A1 (en) * 2010-03-25 2011-09-29 International Business Machines Corporation Using reverse time for coverage analysis
US8707274B2 (en) * 2010-04-09 2014-04-22 AppFirst, Inc. System and method for information extraction from within an active application during execution
JP5450271B2 (en) * 2010-06-10 2014-03-26 株式会社東芝 Simulation apparatus, simulation program and method
JP2012063872A (en) * 2010-09-14 2012-03-29 Fujitsu Ltd Simulation program, simulation device and simulation method
JP5278624B2 (en) * 2010-10-12 2013-09-04 富士通株式会社 Simulation apparatus, method, and program
US8336017B2 (en) * 2011-01-19 2012-12-18 Algotochip Corporation Architecture optimizer
CN102331961B (en) 2011-09-13 2014-02-19 华为技术有限公司 Method, system and dispatcher for simulating multiple processors in parallel
US9448846B2 (en) 2011-12-13 2016-09-20 International Business Machines Corporation Dynamically configurable hardware queues for dispatching jobs to a plurality of hardware acceleration engines
US9256451B2 (en) * 2012-06-29 2016-02-09 Oracle International Corporation Emulation time correction
US9015643B2 (en) * 2013-03-15 2015-04-21 Nvidia Corporation System, method, and computer program product for applying a callback function to data values
US20140278328A1 (en) 2013-03-15 2014-09-18 Nvidia Corporation System, method, and computer program product for constructing a data flow and identifying a construct
US9323502B2 (en) 2013-03-15 2016-04-26 Nvidia Corporation System, method, and computer program product for altering a line of code
US9171115B2 (en) 2013-04-10 2015-10-27 Nvidia Corporation System, method, and computer program product for translating a common hardware database into a logic code model
US9015646B2 (en) 2013-04-10 2015-04-21 Nvidia Corporation System, method, and computer program product for translating a hardware language into a source database
US9021408B2 (en) 2013-04-10 2015-04-28 Nvidia Corporation System, method, and computer program product for translating a source database into a common hardware database
GB201318473D0 (en) * 2013-10-18 2013-12-04 Imperas Software Ltd P7
WO2015133786A1 (en) * 2014-03-03 2015-09-11 엘지전자 주식회사 Method for verifying operations for common application development of in-vehicle infotainment system and mobile terminal
US9081930B1 (en) * 2014-08-04 2015-07-14 Xilinx, Inc. Throughput during high level synthesis
US10642811B1 (en) * 2014-09-10 2020-05-05 Xilinx, Inc. Address-based waveform database architecture
US10802852B1 (en) * 2015-07-07 2020-10-13 Cadence Design Systems, Inc. Method for interactive embedded software debugging through the control of simulation tracing components
US10176078B1 (en) * 2015-08-28 2019-01-08 Cadence Design Systems, Inc. Debugging process
US9898563B2 (en) * 2015-11-13 2018-02-20 Mentor Graphics Corporation Modeling memory in emulation based on cache
US9767237B2 (en) 2015-11-13 2017-09-19 Mentor Graphics Corporation Target capture and replay in emulation
US9990452B2 (en) 2015-11-13 2018-06-05 Mentor Graphics Corporation Low power corruption of memory in emulation
US10068041B2 (en) * 2016-02-01 2018-09-04 King Fahd University Of Petroleum And Minerals Multi-core compact executable trace processor
WO2017142547A1 (en) * 2016-02-19 2017-08-24 Hewlett Packard Enterprise Development Lp Simulator based detection of a violation of a coherency protocol in an incoherent shared memory system
US10635766B2 (en) 2016-12-12 2020-04-28 International Business Machines Corporation Simulation employing level-dependent multitype events
US10698805B1 (en) * 2017-01-25 2020-06-30 Cadence Design Systems, Inc. Method and system for profiling performance of a system on chip
US11113440B1 (en) 2017-03-17 2021-09-07 Synopsys, Inc. Memory migration in hybrid emulation
US20190034318A1 (en) * 2017-07-26 2019-01-31 Western Digital Technologies, Inc. Hardware-Software Co-Verification for Debugging Firmware on a Hardware Simulator
US10698668B1 (en) * 2018-05-29 2020-06-30 Amazon Technologies, Inc. Custom code transformations during compilation process
US11275875B2 (en) * 2018-12-27 2022-03-15 Hitachi Automotive Systems, Ltd. Co-simulation repeater with former trace data
CN110134561B (en) * 2019-05-20 2023-07-14 嘉楠明芯(北京)科技有限公司 Method and device for outputting debugging information in software and hardware collaborative verification
CN111522699B (en) * 2020-04-14 2023-05-23 杭州斯凯数据科技集团有限公司 Detection method for target memory change caused by VMP instruction
CN113515348B (en) * 2021-07-16 2023-11-14 江苏师范大学 Simulator modeling method and device based on opportunity action flow
CN114924999B (en) * 2022-07-21 2022-12-09 苏州浪潮智能科技有限公司 Cache management method, device, system, equipment and medium

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5546562A (en) * 1995-02-28 1996-08-13 Patel; Chandresh Method and apparatus to emulate VLSI circuits within a logic simulator
US5838948A (en) * 1995-12-01 1998-11-17 Eagle Design Automation, Inc. System and method for simulation of computer systems combining hardware and software interaction
US5946472A (en) * 1996-10-31 1999-08-31 International Business Machines Corporation Apparatus and method for performing behavioral modeling in hardware emulation and simulation environments
US6178542B1 (en) * 1997-02-24 2001-01-23 Lucent Technologies Inc. Hardware-software co-synthesis of embedded system architectures using quality of architecture metrics
US6110220A (en) * 1997-02-24 2000-08-29 Lucent Technologies Inc. Concurrent hardware-software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures
US5943490A (en) * 1997-05-30 1999-08-24 Quickturn Design Systems, Inc. Distributed logic analyzer for use in a hardware logic emulation system
US6052524A (en) * 1998-05-14 2000-04-18 Software Development Systems, Inc. System and method for simulation of integrated hardware and software components

Also Published As

Publication number Publication date
US6263302B1 (en) 2001-07-17
WO2001055847A1 (en) 2001-08-02
US20020019969A1 (en) 2002-02-14

Similar Documents

Publication Publication Date Title
AU2001229760A1 (en) Hardware and software co-simulation including simulating the cache of a target processor
AU7371700A (en) Hardware and software co-simulation including executing an analyzed user program
AU8337198A (en) Simulation of computer processor
AU2002218026A1 (en) Cardiovascular disease diagnostic and therapeutic targets
AU2002223824A1 (en) Instruction processor systems and methods
AU2001286956A1 (en) Software development systems and methods
AU2001295688A1 (en) Computer and toys co-operating through a sound interface
AU2002211391A1 (en) Enhanced virtual navigation and examination
AU5244400A (en) Computer game
AU2001236458A1 (en) Firearm simulation and gaming system and method for operatively interconnecting a firearm peripheral to computer system
EP1323081A4 (en) Performance level modeling and simulation of electronic systems having both hardware and software
GB9820490D0 (en) Computer game
AU2001286707A1 (en) Photoacid generators and photoresists comprising same
DE69841269D1 (en) Remote activation of a computer
GB2353612B (en) Processing by use of synchronised tuple spaces and assertions
AU2002332506A1 (en) A target game apparatus and system for use with a toilet
AU2003273033A1 (en) Information processor and program
AU2001253060A1 (en) Cluster and pruning-based language model compression
AU2001239846A1 (en) Dsp with dual-mac processor and dual-mac coprocessor
AU2001229749A1 (en) Computer crt cover
AU2001284038A1 (en) Sgk2 and sgk3 used as diagnostic and therapeutic targets
AU2001238706A1 (en) Photoacid generators and photoresists comprising same
AU1955201A (en) Insecticide targets and methods of use
AU2001296979A1 (en) Virtual training sales and support
AUPQ993400A0 (en) Tornadic fuel processor