ATE86807T1 - Pulsverzoegerungsschaltung. - Google Patents

Pulsverzoegerungsschaltung.

Info

Publication number
ATE86807T1
ATE86807T1 AT90103129T AT90103129T ATE86807T1 AT E86807 T1 ATE86807 T1 AT E86807T1 AT 90103129 T AT90103129 T AT 90103129T AT 90103129 T AT90103129 T AT 90103129T AT E86807 T1 ATE86807 T1 AT E86807T1
Authority
AT
Austria
Prior art keywords
ecl
coupled
delay
output terminal
terminal
Prior art date
Application number
AT90103129T
Other languages
English (en)
Inventor
David A Campbell
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/520,876 external-priority patent/US4565976A/en
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE86807T1 publication Critical patent/ATE86807T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00078Fixed delay
    • H03K2005/00097Avoiding variations of delay using feedback, e.g. controlled by a PLL
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015Layout of the delay element
    • H03K2005/00163Layout of the delay element using bipolar transistors
    • H03K2005/00176Layout of the delay element using bipolar transistors using differential stages

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT90103129T 1983-08-05 1984-08-03 Pulsverzoegerungsschaltung. ATE86807T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/520,876 US4565976A (en) 1983-08-05 1983-08-05 Interruptable voltage-controlled oscillator and phase-locked loop using same
EP90103129A EP0375665B1 (de) 1983-08-05 1984-08-03 Pulsverzögerungsschaltung

Publications (1)

Publication Number Publication Date
ATE86807T1 true ATE86807T1 (de) 1993-03-15

Family

ID=26124965

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90103129T ATE86807T1 (de) 1983-08-05 1984-08-03 Pulsverzoegerungsschaltung.

Country Status (2)

Country Link
EP (1) EP0375665B1 (de)
AT (1) ATE86807T1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5345186A (en) * 1993-01-19 1994-09-06 Credence Systems Corporation Retriggered oscillator for jitter-free phase locked loop frequency synthesis

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3431505A (en) * 1964-10-26 1969-03-04 Rca Corp Emitter follower circuit having substantially constant current emitter supply

Also Published As

Publication number Publication date
EP0375665A3 (en) 1990-08-22
EP0375665B1 (de) 1993-03-10
EP0375665A2 (de) 1990-06-27

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee