ATE549796T1 - Schaltung zum störungsfreien umschalten zwischen taktsignalen - Google Patents

Schaltung zum störungsfreien umschalten zwischen taktsignalen

Info

Publication number
ATE549796T1
ATE549796T1 AT10190702T AT10190702T ATE549796T1 AT E549796 T1 ATE549796 T1 AT E549796T1 AT 10190702 T AT10190702 T AT 10190702T AT 10190702 T AT10190702 T AT 10190702T AT E549796 T1 ATE549796 T1 AT E549796T1
Authority
AT
Austria
Prior art keywords
signal
circuit
clock
error
clock signals
Prior art date
Application number
AT10190702T
Other languages
English (en)
Inventor
Ellier Pierre Saint
Sebastien Geairon
Pascal Commun
Original Assignee
Thales Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales Sa filed Critical Thales Sa
Application granted granted Critical
Publication of ATE549796T1 publication Critical patent/ATE549796T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/26—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being duration, interval, position, frequency, or sequence
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AT10190702T 2009-11-13 2010-11-10 Schaltung zum störungsfreien umschalten zwischen taktsignalen ATE549796T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0905472A FR2952770B1 (fr) 2009-11-13 2009-11-13 Circuit de commutation d'horloges sans parasites

Publications (1)

Publication Number Publication Date
ATE549796T1 true ATE549796T1 (de) 2012-03-15

Family

ID=42372355

Family Applications (1)

Application Number Title Priority Date Filing Date
AT10190702T ATE549796T1 (de) 2009-11-13 2010-11-10 Schaltung zum störungsfreien umschalten zwischen taktsignalen

Country Status (4)

Country Link
US (1) US8381010B2 (de)
EP (1) EP2326004B1 (de)
AT (1) ATE549796T1 (de)
FR (1) FR2952770B1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102191167B1 (ko) 2014-08-06 2020-12-15 삼성전자주식회사 클럭 스위치 장치 및 이를 포함하는 시스템-온-칩
CN111913038B (zh) * 2020-06-03 2023-12-19 大唐微电子技术有限公司 一种多路时钟信号频率检测装置和方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3346942C1 (de) * 1983-12-24 1985-01-24 Hewlett-Packard GmbH, 7030 Böblingen Vergleicherschaltung fuer binaere Signale
US5133064A (en) * 1987-04-27 1992-07-21 Hitachi, Ltd. Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
JP2739964B2 (ja) * 1988-09-28 1998-04-15 株式会社東芝 クロック切替回路
JP2891125B2 (ja) * 1994-11-24 1999-05-17 ティアック株式会社 光ディスク再生装置
US5524035A (en) * 1995-08-10 1996-06-04 International Business Machines Corporation Symmetric clock system for a data processing system including dynamically switchable frequency divider
DE10018190C2 (de) * 1999-05-18 2003-04-17 Ibm Unterbrechnungsloses Umschalten zwischen zwei Oszillator-Präzisionstaktgebern
US20040153681A1 (en) * 2002-11-12 2004-08-05 Broadcom Corporation Phase detector for extended linear response and high-speed data regeneration

Also Published As

Publication number Publication date
FR2952770B1 (fr) 2011-11-25
EP2326004B1 (de) 2012-03-14
FR2952770A1 (fr) 2011-05-20
EP2326004A1 (de) 2011-05-25
US8381010B2 (en) 2013-02-19
US20110283133A1 (en) 2011-11-17

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