ATE534950T1 - Schaltungen und verfahren zur durchführung von potenzierung und invertierung finiter feldelemente - Google Patents

Schaltungen und verfahren zur durchführung von potenzierung und invertierung finiter feldelemente

Info

Publication number
ATE534950T1
ATE534950T1 AT10161704T AT10161704T ATE534950T1 AT E534950 T1 ATE534950 T1 AT E534950T1 AT 10161704 T AT10161704 T AT 10161704T AT 10161704 T AT10161704 T AT 10161704T AT E534950 T1 ATE534950 T1 AT E534950T1
Authority
AT
Austria
Prior art keywords
field element
circuits
exponentiation
parallel
finite field
Prior art date
Application number
AT10161704T
Other languages
English (en)
Inventor
Bruce Edward Reidenbach
Original Assignee
Itt Mfg Enterprises Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Itt Mfg Enterprises Inc filed Critical Itt Mfg Enterprises Inc
Application granted granted Critical
Publication of ATE534950T1 publication Critical patent/ATE534950T1/de

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/724—Finite field arithmetic
    • G06F7/726—Inversion; Reciprocal calculation; Division of elements of a finite field

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
AT10161704T 2009-06-02 2010-05-03 Schaltungen und verfahren zur durchführung von potenzierung und invertierung finiter feldelemente ATE534950T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/476,389 US8443028B2 (en) 2009-06-02 2009-06-02 Circuits and methods for performing exponentiation and inversion of finite field elements

Publications (1)

Publication Number Publication Date
ATE534950T1 true ATE534950T1 (de) 2011-12-15

Family

ID=42359487

Family Applications (1)

Application Number Title Priority Date Filing Date
AT10161704T ATE534950T1 (de) 2009-06-02 2010-05-03 Schaltungen und verfahren zur durchführung von potenzierung und invertierung finiter feldelemente

Country Status (3)

Country Link
US (1) US8443028B2 (de)
EP (1) EP2261795B9 (de)
AT (1) ATE534950T1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11093213B1 (en) 2010-12-29 2021-08-17 Ternarylogic Llc Cryptographic computer machines with novel switching devices
US9141131B2 (en) * 2011-08-26 2015-09-22 Cognitive Electronics, Inc. Methods and systems for performing exponentiation in a parallel processing environment
CN102902510B (zh) 2012-08-03 2016-04-13 华南理工大学 一种有限域求逆器
US9025766B2 (en) * 2013-03-13 2015-05-05 Intel Corporation Efficient hardware architecture for a S1 S-box in a ZUC cipher
US9804828B2 (en) 2014-11-24 2017-10-31 Apple Inc. Cubic root of a galois field element
US9473176B2 (en) * 2014-11-27 2016-10-18 Apple Inc. Implementation of log and inverse operation in a Galois Field
CN104536943B (zh) * 2015-01-13 2017-08-29 江苏中兴微通信息科技有限公司 一种低除法量的矩阵求逆定点实现方法及装置
US10409615B2 (en) * 2017-06-19 2019-09-10 The Regents Of The University Of Michigan Configurable arithmetic unit
US11032061B2 (en) * 2018-04-27 2021-06-08 Microsoft Technology Licensing, Llc Enabling constant plaintext space in bootstrapping in fully homomorphic encryption
CN114595486B (zh) * 2022-05-10 2022-08-05 深圳佰维存储科技股份有限公司 零数据识别方法、装置、可读存储介质及电子设备

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5812438A (en) * 1995-10-12 1998-09-22 Adaptec, Inc. Arithmetic logic unit and method for numerical computations in galois fields
FR2754616B1 (fr) 1996-10-11 1998-12-04 Sgs Thomson Microelectronics Procede et circuit de division d'elements d'un corps de galois
KR100304193B1 (ko) * 1998-02-06 2001-11-22 윤종용 리드솔로몬복호기의역수구현회로
JP3659320B2 (ja) 2000-06-21 2005-06-15 インターナショナル・ビジネス・マシーンズ・コーポレーション 乗算モジュール、乗法逆元演算回路、乗法逆元演算制御方式、該乗法逆元演算を用いる装置、暗号装置、誤り訂正復号器
US6779011B2 (en) * 2001-02-28 2004-08-17 Maxtor Corporation System for performing multiplication and division in GF(22M)

Also Published As

Publication number Publication date
EP2261795B9 (de) 2012-05-09
US8443028B2 (en) 2013-05-14
EP2261795A1 (de) 2010-12-15
US20100306299A1 (en) 2010-12-02
EP2261795B8 (de) 2012-05-02
EP2261795B1 (de) 2011-11-23

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