ATE529968T1 - Vorrichtung und verfahren zur ausführung eines kryptographischen algorithmus - Google Patents
Vorrichtung und verfahren zur ausführung eines kryptographischen algorithmusInfo
- Publication number
- ATE529968T1 ATE529968T1 AT02710985T AT02710985T ATE529968T1 AT E529968 T1 ATE529968 T1 AT E529968T1 AT 02710985 T AT02710985 T AT 02710985T AT 02710985 T AT02710985 T AT 02710985T AT E529968 T1 ATE529968 T1 AT E529968T1
- Authority
- AT
- Austria
- Prior art keywords
- modulo
- value
- equal
- cryptographic algorithm
- executing
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/723—Modular exponentiation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
- H04L9/004—Countermeasures against attacks on cryptographic mechanisms for fault attacks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
- H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
- H04L9/302—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters involving the integer factorization problem, e.g. RSA or quadratic sieve [QS] schemes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/08—Randomization, e.g. dummy operations or using noise
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0100688A FR2819663B1 (fr) | 2001-01-18 | 2001-01-18 | Dispositif et procede d'execution d'un algorithme cryptographique |
PCT/FR2002/000113 WO2002058321A1 (fr) | 2001-01-18 | 2002-01-11 | Dispositif et procede d'execution d'un algorithme cryptographique |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE529968T1 true ATE529968T1 (de) | 2011-11-15 |
Family
ID=8858987
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT02710985T ATE529968T1 (de) | 2001-01-18 | 2002-01-11 | Vorrichtung und verfahren zur ausführung eines kryptographischen algorithmus |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1352494B1 (de) |
AT (1) | ATE529968T1 (de) |
ES (1) | ES2371333T3 (de) |
FR (1) | FR2819663B1 (de) |
WO (1) | WO2002058321A1 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004001659B4 (de) * | 2004-01-12 | 2007-10-31 | Infineon Technologies Ag | Vorrichtung und Verfahren zum Konvertieren einer ersten Nachricht in eine zweite Nachricht |
FR2867635B1 (fr) * | 2004-03-11 | 2006-09-22 | Oberthur Card Syst Sa | Procede de traitement de donnees securise, base notamment sur un algorithme cryptographique |
CN101147123A (zh) * | 2005-03-08 | 2008-03-19 | Nxp股份有限公司 | 保护数据处理设备不受电磁辐射攻击的配置和方法 |
US8817974B2 (en) | 2011-05-11 | 2014-08-26 | Nxp B.V. | Finite field cryptographic arithmetic resistant to fault attacks |
US11418334B2 (en) | 2017-10-18 | 2022-08-16 | Cryptography Research, Inc. | Protecting modular inversion operation from external monitoring attacks |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5991415A (en) * | 1997-05-12 | 1999-11-23 | Yeda Research And Development Co. Ltd. At The Weizmann Institute Of Science | Method and apparatus for protecting public key schemes from timing and fault attacks |
US6144740A (en) * | 1998-05-20 | 2000-11-07 | Network Security Technology Co. | Method for designing public key cryptosystems against fault-based attacks with an implementation |
-
2001
- 2001-01-18 FR FR0100688A patent/FR2819663B1/fr not_active Expired - Fee Related
-
2002
- 2002-01-11 EP EP02710985A patent/EP1352494B1/de not_active Expired - Lifetime
- 2002-01-11 WO PCT/FR2002/000113 patent/WO2002058321A1/fr not_active Application Discontinuation
- 2002-01-11 ES ES02710985T patent/ES2371333T3/es not_active Expired - Lifetime
- 2002-01-11 AT AT02710985T patent/ATE529968T1/de not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
FR2819663A1 (fr) | 2002-07-19 |
EP1352494A1 (de) | 2003-10-15 |
WO2002058321A1 (fr) | 2002-07-25 |
EP1352494B1 (de) | 2011-10-19 |
FR2819663B1 (fr) | 2003-04-11 |
ES2371333T3 (es) | 2011-12-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |