ATE484791T1 - BIT GENERATOR - Google Patents

BIT GENERATOR

Info

Publication number
ATE484791T1
ATE484791T1 AT08776532T AT08776532T ATE484791T1 AT E484791 T1 ATE484791 T1 AT E484791T1 AT 08776532 T AT08776532 T AT 08776532T AT 08776532 T AT08776532 T AT 08776532T AT E484791 T1 ATE484791 T1 AT E484791T1
Authority
AT
Austria
Prior art keywords
output
input
bit generator
operationally connected
xor gate
Prior art date
Application number
AT08776532T
Other languages
German (de)
Inventor
Uri Kaluzhny
Original Assignee
Nds Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nds Ltd filed Critical Nds Ltd
Application granted granted Critical
Publication of ATE484791T1 publication Critical patent/ATE484791T1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G06F7/582—Pseudo-random number generators
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators

Landscapes

  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Pulse Circuits (AREA)
  • Pinball Game Machines (AREA)
  • Logic Circuits (AREA)
  • Shift Register Type Memory (AREA)
  • Detergent Compositions (AREA)
  • Electrophonic Musical Instruments (AREA)
  • Saccharide Compounds (AREA)

Abstract

A system comprising a feedback shift-register having L serially connected stages, and a non-linear feedback sub-system to receive input from stage n and 2n+1, and including a first AND gate having a first and second input operationally connected to the output of stage n and 2n+1, respectively, the sub-system having an output based on a value of an output of the first AND gate, a bit generator operative to generate bits, and an XOR gate having a first and second input, an output of the bit generator being operationally connected to the first input of the XOR gate, the output of the sub-system being operationally connected to the second input of the XOR gate, the output of the XOR gate being operationally connected to the input of the first stage of the shift-register. Related apparatus and methods are also described.
AT08776532T 2007-12-12 2008-06-26 BIT GENERATOR ATE484791T1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IL188089A IL188089A (en) 2007-12-12 2007-12-12 Bit generator
PCT/IB2008/052574 WO2009074889A1 (en) 2007-12-12 2008-06-26 Bit generator

Publications (1)

Publication Number Publication Date
ATE484791T1 true ATE484791T1 (en) 2010-10-15

Family

ID=39791105

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08776532T ATE484791T1 (en) 2007-12-12 2008-06-26 BIT GENERATOR

Country Status (8)

Country Link
US (1) US8266194B2 (en)
EP (1) EP2100219B9 (en)
AT (1) ATE484791T1 (en)
DE (1) DE602008002998D1 (en)
ES (1) ES2354136T3 (en)
IL (1) IL188089A (en)
PT (1) PT2100219E (en)
WO (1) WO2009074889A1 (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2465419B (en) * 2008-11-20 2013-12-11 Simba Hpc Ltd Random number generator circuits
US9747105B2 (en) 2009-12-17 2017-08-29 Intel Corporation Method and apparatus for performing a shift and exclusive or operation in a single instruction
DE102011052230B4 (en) * 2011-07-28 2018-05-09 Infineon Technologies Ag Method and apparatus for generating random wait states
US9304740B2 (en) * 2012-10-09 2016-04-05 King Abdullah University Of Science And Technology Chaos-based pseudo-random number generation
IL234956A (en) 2014-10-02 2017-10-31 Kaluzhny Uri Bus protection with improved key entropy
US10958414B2 (en) 2016-02-23 2021-03-23 Google Llc Clock period randomization for defense against cryptographic attacks
US10019571B2 (en) 2016-03-13 2018-07-10 Winbond Electronics Corporation Protection from side-channel attacks by varying clock delays
US10860403B2 (en) * 2017-09-25 2020-12-08 The Boeing Company Systems and methods for facilitating truly random bit generation
US11362869B2 (en) 2018-07-31 2022-06-14 Telefonaktiebolaget Lm Ericsson (Publ) Method, transmitter, structure, transceiver and access point for provision of multi-carrier on-off keying signal
US10977003B2 (en) 2019-08-28 2021-04-13 International Business Machines Corporation Linear feedback shift register with near-maximal length sequences
US11048476B2 (en) 2019-08-28 2021-06-29 International Business Machines Corporation Non-linear feedback shift register
CN114201141A (en) * 2020-09-02 2022-03-18 长鑫存储技术有限公司 Random number generating circuit

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5105376A (en) * 1990-08-08 1992-04-14 Vlsi Technology, Inc. Linear feedback shift registers
US5844925A (en) 1996-07-17 1998-12-01 Ericsson Inc. Spiral scrambling
US6065029A (en) * 1998-05-26 2000-05-16 N*Able Technologies, Inc. Method and system for providing a random number generator
US6240432B1 (en) * 1998-12-28 2001-05-29 Vanguard International Semiconductor Corporation Enhanced random number generator
IL132898A (en) 1999-11-11 2009-09-01 Nds Ltd System for bitstream generation
US6480110B2 (en) * 2000-12-01 2002-11-12 Microchip Technology Incorporated Inductively tunable antenna for a radio frequency identification tag
ATE348359T1 (en) 2001-01-16 2007-01-15 Ericsson Telefon Ab L M RANDOM NUMBER GENERATOR BASED ON COMPRESSION
US6641050B2 (en) 2001-11-06 2003-11-04 International Business Machines Corporation Secure credit card
US7571200B2 (en) * 2002-04-24 2009-08-04 Hewlett-Packard Development Company, L.P. Seedable pseudo-random number generator
US7206797B2 (en) 2003-04-14 2007-04-17 M-Systems Flash Disk Pioneers Ltd. Random number slip and swap generators
DE10339999B4 (en) 2003-08-29 2005-07-14 Infineon Technologies Ag Pseudorandom number generator
US7827223B2 (en) * 2004-04-22 2010-11-02 Fortress Gb Ltd. Accelerated throughput synchronized word stream cipher, message authenticator and zero-knowledge output random number generator
DE102004037814B4 (en) 2004-08-04 2010-12-16 Infineon Technologies Ag Apparatus and method for generating a sequence of numbers
GB2456683B (en) * 2006-09-07 2011-01-19 Fortress Gb Ltd A system and method to preclude message modification in data authentication systems through efficient use of feedback in cryptographic functions

Also Published As

Publication number Publication date
US8266194B2 (en) 2012-09-11
PT2100219E (en) 2011-01-05
DE602008002998D1 (en) 2010-11-25
WO2009074889A1 (en) 2009-06-18
ES2354136T3 (en) 2011-03-10
EP2100219A1 (en) 2009-09-16
EP2100219B9 (en) 2011-10-12
US20100036899A1 (en) 2010-02-11
IL188089A (en) 2013-02-28
EP2100219B1 (en) 2010-10-13

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