ATE461479T1 - Verfahren und vorrichtung zur durchführung modularer potenzierungen - Google Patents

Verfahren und vorrichtung zur durchführung modularer potenzierungen

Info

Publication number
ATE461479T1
ATE461479T1 AT05818313T AT05818313T ATE461479T1 AT E461479 T1 ATE461479 T1 AT E461479T1 AT 05818313 T AT05818313 T AT 05818313T AT 05818313 T AT05818313 T AT 05818313T AT E461479 T1 ATE461479 T1 AT E461479T1
Authority
AT
Austria
Prior art keywords
montgomery
mme
modular
mmes
potentiations
Prior art date
Application number
AT05818313T
Other languages
English (en)
Inventor
Kamal Koshy
Gilbert Wolrich
Jaroslaw Sydir
Wajdi Feghali
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE461479T1 publication Critical patent/ATE461479T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/728Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic using Montgomery reduction

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Executing Machine-Instructions (AREA)
  • Complex Calculations (AREA)
  • Paper (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Advance Control (AREA)
  • Devices For Executing Special Programs (AREA)
  • Supports For Pipes And Cables (AREA)
AT05818313T 2004-09-16 2005-09-02 Verfahren und vorrichtung zur durchführung modularer potenzierungen ATE461479T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/944,353 US20060059219A1 (en) 2004-09-16 2004-09-16 Method and apparatus for performing modular exponentiations
PCT/US2005/031672 WO2006039068A2 (en) 2004-09-16 2005-09-02 Method and apparatus for performing modular exponentiations

Publications (1)

Publication Number Publication Date
ATE461479T1 true ATE461479T1 (de) 2010-04-15

Family

ID=36035378

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05818313T ATE461479T1 (de) 2004-09-16 2005-09-02 Verfahren und vorrichtung zur durchführung modularer potenzierungen

Country Status (6)

Country Link
US (1) US20060059219A1 (de)
EP (1) EP1789869B1 (de)
CN (1) CN1750460B (de)
AT (1) ATE461479T1 (de)
DE (1) DE602005020031D1 (de)
WO (1) WO2006039068A2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7725624B2 (en) * 2005-12-30 2010-05-25 Intel Corporation System and method for cryptography processing units and multiplier
US20070157030A1 (en) * 2005-12-30 2007-07-05 Feghali Wajdi K Cryptographic system component
US8073892B2 (en) 2005-12-30 2011-12-06 Intel Corporation Cryptographic system, method and multiplier
US8229109B2 (en) * 2006-06-27 2012-07-24 Intel Corporation Modular reduction using folding
US7827471B2 (en) * 2006-10-12 2010-11-02 Intel Corporation Determining message residue using a set of polynomials
US20080140753A1 (en) * 2006-12-08 2008-06-12 Vinodh Gopal Multiplier
US8689078B2 (en) 2007-07-13 2014-04-01 Intel Corporation Determining a message residue
US8670557B2 (en) * 2007-09-10 2014-03-11 Spansion Llc Cryptographic system with modular randomization of exponentiation
US7886214B2 (en) * 2007-12-18 2011-02-08 Intel Corporation Determining a message residue
US8042025B2 (en) * 2007-12-18 2011-10-18 Intel Corporation Determining a message residue
US20100088526A1 (en) * 2008-10-02 2010-04-08 Mcm Portfolio Llc System and Method for Modular Exponentiation
CN101478390B (zh) * 2009-01-15 2011-11-02 华南理工大学 基于网络处理器的第二代密钥交换方法
US9990201B2 (en) * 2009-12-22 2018-06-05 Intel Corporation Multiplication instruction for which execution completes without writing a carry flag
US8832412B2 (en) * 2011-07-20 2014-09-09 Broadcom Corporation Scalable processing unit
US9985784B2 (en) 2014-12-23 2018-05-29 Nxp B.V. Efficient smooth encodings for modular exponentiation
US9904516B2 (en) * 2014-12-23 2018-02-27 Nxp B.V. Modular exponentiation using look-up tables
US9906368B2 (en) 2014-12-23 2018-02-27 Nxp B.V. General encoding functions for modular exponentiation encryption schemes
CN112068801B (zh) * 2019-06-11 2022-09-09 云南大学 一种乘法群上的最优带符号二进制快速计算方法及模幂运算
DE102020102453A1 (de) * 2020-01-31 2021-08-05 Infineon Technologies Ag Integrierte Schaltung zum modularen Multiplizieren von zwei ganzen Zahlen für ein kryptographisches Verfahren und Verfahren zur kryptographischen Verarbeitung von Daten basierend auf modularer Multiplikation
TWI784406B (zh) * 2020-06-04 2022-11-21 熵碼科技股份有限公司 採用迭代計算的模數運算電路
CN117240601B (zh) * 2023-11-09 2024-03-26 深圳大普微电子股份有限公司 加密处理方法、加密处理电路、处理终端及存储介质

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7240204B1 (en) * 2000-03-31 2007-07-03 State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Oregon State University Scalable and unified multiplication methods and apparatus
JP2002229445A (ja) * 2001-01-30 2002-08-14 Mitsubishi Electric Corp べき乗剰余演算器
CN1271506C (zh) * 2001-03-19 2006-08-23 深圳市中兴集成电路设计有限责任公司 Rsa加密算法的实现电路及方法
CN1375765A (zh) * 2001-03-19 2002-10-23 深圳市中兴集成电路设计有限责任公司 一种快速大数模乘运算电路
US6973470B2 (en) * 2001-06-13 2005-12-06 Corrent Corporation Circuit and method for performing multiple modulo mathematic operations
US20030065696A1 (en) * 2001-09-28 2003-04-03 Ruehle Michael D. Method and apparatus for performing modular exponentiation
US6732133B2 (en) * 2001-09-28 2004-05-04 Intel Corporation Montgomery multiplier with dual independent channels
US7266577B2 (en) * 2002-05-20 2007-09-04 Kabushiki Kaisha Toshiba Modular multiplication apparatus, modular multiplication method, and modular exponentiation apparatus

Also Published As

Publication number Publication date
EP1789869B1 (de) 2010-03-17
US20060059219A1 (en) 2006-03-16
CN1750460B (zh) 2011-11-16
DE602005020031D1 (de) 2010-04-29
EP1789869A2 (de) 2007-05-30
WO2006039068A3 (en) 2006-06-22
CN1750460A (zh) 2006-03-22
WO2006039068A2 (en) 2006-04-13

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