ATE459042T1 - Rechnersystem mit parallelität auf befehls- und draht-ebene - Google Patents

Rechnersystem mit parallelität auf befehls- und draht-ebene

Info

Publication number
ATE459042T1
ATE459042T1 AT04726598T AT04726598T ATE459042T1 AT E459042 T1 ATE459042 T1 AT E459042T1 AT 04726598 T AT04726598 T AT 04726598T AT 04726598 T AT04726598 T AT 04726598T AT E459042 T1 ATE459042 T1 AT E459042T1
Authority
AT
Austria
Prior art keywords
processing
instruction
processing elements
thread
level parallelism
Prior art date
Application number
AT04726598T
Other languages
English (en)
Inventor
Oliveira Kastrup Pereira Bernardo De
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE459042T1 publication Critical patent/ATE459042T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G06F9/3828—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage with global bypass, e.g. between pipelines, between clusters
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G06F9/3891—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Complex Calculations (AREA)
  • Communication Control (AREA)
AT04726598T 2003-04-15 2004-04-08 Rechnersystem mit parallelität auf befehls- und draht-ebene ATE459042T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP03101016 2003-04-15
PCT/IB2004/050410 WO2004092949A2 (en) 2003-04-15 2004-04-08 Processing system with instruction-and thread-level parallelism

Publications (1)

Publication Number Publication Date
ATE459042T1 true ATE459042T1 (de) 2010-03-15

Family

ID=33185922

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04726598T ATE459042T1 (de) 2003-04-15 2004-04-08 Rechnersystem mit parallelität auf befehls- und draht-ebene

Country Status (8)

Country Link
US (1) US20060212678A1 (de)
EP (1) EP1623318B1 (de)
JP (1) JP4589305B2 (de)
KR (1) KR20050123163A (de)
CN (1) CN1833222A (de)
AT (1) ATE459042T1 (de)
DE (1) DE602004025691D1 (de)
WO (1) WO2004092949A2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1732457A (zh) * 2002-12-30 2006-02-08 皇家飞利浦电子股份有限公司 处理系统
US7620796B2 (en) * 2006-01-13 2009-11-17 Broadcom Corporation System and method for acceleration of streams of dependent instructions within a microprocessor
JP4784827B2 (ja) 2006-06-06 2011-10-05 学校法人早稲田大学 ヘテロジニアスマルチプロセッサ向けグローバルコンパイラ
US8478967B2 (en) * 2009-06-01 2013-07-02 National Instruments Corporation Automatically creating parallel iterative program code in a data flow program
CN102207892B (zh) * 2011-05-27 2013-03-27 清华大学 一种动态可重构处理器内子单元间进行同步的方法
KR101929754B1 (ko) * 2012-03-16 2018-12-17 삼성전자 주식회사 미니 코어 기반의 재구성가능 프로세서, 이를 위한 스케줄 장치 및 방법
US9715392B2 (en) * 2014-08-29 2017-07-25 Qualcomm Incorporated Multiple clustered very long instruction word processing core
KR102277439B1 (ko) * 2014-10-21 2021-07-14 삼성전자주식회사 재구성 가능 프로세서 및 그 동작 방법
US9830150B2 (en) * 2015-12-04 2017-11-28 Google Llc Multi-functional execution lane for image processor
US10185568B2 (en) 2016-04-22 2019-01-22 Microsoft Technology Licensing, Llc Annotation logic for dynamic instruction lookahead distance determination
US10846091B2 (en) 2019-02-26 2020-11-24 Apple Inc. Coprocessor with distributed register

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3623840B2 (ja) * 1996-01-31 2005-02-23 株式会社ルネサステクノロジ データ処理装置及びマイクロプロセッサ
US7051329B1 (en) * 1999-12-28 2006-05-23 Intel Corporation Method and apparatus for managing resources in a multithreaded processor
US6988181B2 (en) * 2000-03-08 2006-01-17 Sun Microsystems, Inc. VLIW computer processing architecture having a scalable number of register files

Also Published As

Publication number Publication date
DE602004025691D1 (de) 2010-04-08
EP1623318B1 (de) 2010-02-24
EP1623318A2 (de) 2006-02-08
WO2004092949A3 (en) 2006-03-30
US20060212678A1 (en) 2006-09-21
KR20050123163A (ko) 2005-12-29
JP2006523883A (ja) 2006-10-19
CN1833222A (zh) 2006-09-13
JP4589305B2 (ja) 2010-12-01
WO2004092949A2 (en) 2004-10-28

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