ATE450822T1 - Digital gesteuerter oszillator, insbesondere für radiofrequenz-signalempfänger - Google Patents
Digital gesteuerter oszillator, insbesondere für radiofrequenz-signalempfängerInfo
- Publication number
- ATE450822T1 ATE450822T1 AT00204544T AT00204544T ATE450822T1 AT E450822 T1 ATE450822 T1 AT E450822T1 AT 00204544 T AT00204544 T AT 00204544T AT 00204544 T AT00204544 T AT 00204544T AT E450822 T1 ATE450822 T1 AT E450822T1
- Authority
- AT
- Austria
- Prior art keywords
- stage
- frequency
- oscillator
- bits
- clk
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/022—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Position Fixing By Use Of Radio Waves (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Transmitters (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00204544A EP1215557B1 (de) | 2000-12-15 | 2000-12-15 | Digital gesteuerter Oszillator, insbesondere für Radiofrequenz-Signalempfänger |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE450822T1 true ATE450822T1 (de) | 2009-12-15 |
Family
ID=8172439
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT00204544T ATE450822T1 (de) | 2000-12-15 | 2000-12-15 | Digital gesteuerter oszillator, insbesondere für radiofrequenz-signalempfänger |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1215557B1 (de) |
AT (1) | ATE450822T1 (de) |
DE (1) | DE60043445D1 (de) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5073869A (en) * | 1989-08-25 | 1991-12-17 | Titan Linkabit Corporation | Suppression of spurious frequency components in direct digital frequency synthesizer |
US5371765A (en) * | 1992-07-10 | 1994-12-06 | Hewlett-Packard Company | Binary phase accumulator for decimal frequency synthesis |
US5646967A (en) * | 1996-05-09 | 1997-07-08 | National Semiconductor Corporation | Multi-phase triangular wave synthesizer for phase-to-frequency converter |
-
2000
- 2000-12-15 EP EP00204544A patent/EP1215557B1/de not_active Expired - Lifetime
- 2000-12-15 AT AT00204544T patent/ATE450822T1/de not_active IP Right Cessation
- 2000-12-15 DE DE60043445T patent/DE60043445D1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1215557A1 (de) | 2002-06-19 |
DE60043445D1 (de) | 2010-01-14 |
EP1215557B1 (de) | 2009-12-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1650523B (zh) | 用于频率合成器的锁相环中的方法和装置 | |
US7689190B2 (en) | Controlling the frequency of an oscillator | |
US8324760B2 (en) | Semiconductor device and radio communication device | |
US5673212A (en) | Method and apparatus for numerically controlled oscillator with partitioned phase accumulator | |
KR20100121546A (ko) | 낮은 듀티 사이클 신호를 프로세싱하기 위해 상대적으로 빠른 방식으로 신호 프로세싱 디바이스를 인에이블시키는 시스템 및 방법 | |
EP1807935B1 (de) | Leistungsbegrenzung eines kondensatorbank-oszillators durch wechselnde frequenz | |
CN102522986A (zh) | 模拟/数字延迟锁定环 | |
US7362835B2 (en) | Clock generator circuit and related method for generating output clock signal | |
WO2003073244A3 (en) | Frequency divider | |
US5844937A (en) | Matched filter system | |
US5790590A (en) | Matched filter circuit | |
US6370186B1 (en) | Signal processing | |
EP1333578A3 (de) | Verschachtelter Taktsignalgenerator mit einer in Reihe geschaltete Verzögerungslemente und Ringzähler aufweisenden Architektur | |
ATE450822T1 (de) | Digital gesteuerter oszillator, insbesondere für radiofrequenz-signalempfänger | |
US6370162B1 (en) | Frame aligner including two buffers | |
KR100679862B1 (ko) | 지연고정루프를 이용한 주파수 체배기 | |
US6157267A (en) | Variable frequency multiple loop ring oscillator | |
HK1061036A1 (en) | Dual-edge m/n counter | |
US5926512A (en) | Matched filter circuit | |
US5101370A (en) | Programmable digital accumulate and scale circuit | |
WO2002054598A3 (en) | Precision phase generator | |
EP0993122B1 (de) | Verfahren zur Reduzierung der Einschwingzeit von PLL Schaltungen | |
Perakis et al. | The VLSI implementation of a baseband receiver for DECT-based portable applications | |
JP3578943B2 (ja) | 遅延発生器ならびにその遅延発生器を用いた周波数シンセサイザおよび逓倍器 | |
KR0141385B1 (ko) | 다채널 무선통신 장치에서의 최장 부호열 발생기 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |