ATE401624T1 - DATA PROCESSING DEVICE AND METHOD FOR OPERATION THEREOF TO PREVENT DIFFERENTIAL POWER CONSUMPTION ANALYSIS - Google Patents

DATA PROCESSING DEVICE AND METHOD FOR OPERATION THEREOF TO PREVENT DIFFERENTIAL POWER CONSUMPTION ANALYSIS

Info

Publication number
ATE401624T1
ATE401624T1 AT99948823T AT99948823T ATE401624T1 AT E401624 T1 ATE401624 T1 AT E401624T1 AT 99948823 T AT99948823 T AT 99948823T AT 99948823 T AT99948823 T AT 99948823T AT E401624 T1 ATE401624 T1 AT E401624T1
Authority
AT
Austria
Prior art keywords
clock pulse
data processing
processing device
clock
integrated circuit
Prior art date
Application number
AT99948823T
Other languages
German (de)
Inventor
Markus Feuser
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE401624T1 publication Critical patent/ATE401624T1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/08—Randomization, e.g. dummy operations or using noise
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Abstract

The invention relates to a data processing device (100) and to a method for operating a data processing device, notably a chip card. The device comprises an integrated circuit (10) which in accordance with a first clock pulse carries out useful calculations, notably cryptographic operations. To this end a second clock pulse is randomly derived from the first clock pulse and supplied to the integrated circuit (10) instead of the first clock pulse. Distances between the edges of the second clock pulse vary randomly over time. To this end the invention provides for a clock control unit (14) which is linked to the integrated circuit (10) as well as for a random generator (12) which is connected to the clock pulse control unit (14). The clock control unit (14) is configured such that it generates a second clock (20) in accordance with the random generator (12) and the first clock pulse (18), and the second clock pulse varies randomly and controls the integrated circuit (10).
AT99948823T 1998-09-30 1999-09-21 DATA PROCESSING DEVICE AND METHOD FOR OPERATION THEREOF TO PREVENT DIFFERENTIAL POWER CONSUMPTION ANALYSIS ATE401624T1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19844962 1998-09-30
DE19936938A DE19936938A1 (en) 1998-09-30 1999-08-05 Data processing device and method for its operation to prevent differential power consumption analysis

Publications (1)

Publication Number Publication Date
ATE401624T1 true ATE401624T1 (en) 2008-08-15

Family

ID=7882872

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99948823T ATE401624T1 (en) 1998-09-30 1999-09-21 DATA PROCESSING DEVICE AND METHOD FOR OPERATION THEREOF TO PREVENT DIFFERENTIAL POWER CONSUMPTION ANALYSIS

Country Status (3)

Country Link
KR (1) KR100718352B1 (en)
AT (1) ATE401624T1 (en)
DE (2) DE19936938A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10213268A1 (en) * 2002-03-25 2003-10-23 Infineon Technologies Ag Device and method for the safe loading of user data
DE10217291B4 (en) * 2002-04-18 2005-09-29 Infineon Technologies Ag Data processing device and method for operating a data processing module
DE10360343A1 (en) * 2003-12-22 2005-07-28 Giesecke & Devrient Gmbh Portable data carrier
KR100974773B1 (en) * 2008-08-12 2010-08-06 현대자동차주식회사 Supporting device for exhaust gas catalytic converter
GB2479871A (en) * 2010-04-26 2011-11-02 David Coyne System for preventing side channel attacks on a synchronous logic device.
US9735953B2 (en) * 2015-03-06 2017-08-15 Qualcomm Incorporated Side channel analysis resistant architecture
DE102016009045A1 (en) * 2016-07-25 2018-01-25 Detlef Fischer Intermediate switching device and operating method for it

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5404402A (en) * 1993-12-21 1995-04-04 Gi Corporation Clock frequency modulation for secure microprocessors

Also Published As

Publication number Publication date
DE19936938A1 (en) 2000-04-06
KR20010032564A (en) 2001-04-25
DE59914806D1 (en) 2008-08-28
KR100718352B1 (en) 2007-05-14

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Legal Events

Date Code Title Description
REN Ceased due to non-payment of the annual fee