ATE392097T1 - Fehlertolerante schaltmatrix mit einer ebene für ein telekommunikationssystem - Google Patents

Fehlertolerante schaltmatrix mit einer ebene für ein telekommunikationssystem

Info

Publication number
ATE392097T1
ATE392097T1 AT05291321T AT05291321T ATE392097T1 AT E392097 T1 ATE392097 T1 AT E392097T1 AT 05291321 T AT05291321 T AT 05291321T AT 05291321 T AT05291321 T AT 05291321T AT E392097 T1 ATE392097 T1 AT E392097T1
Authority
AT
Austria
Prior art keywords
switch
switch fabric
ppl
line termination
fabric
Prior art date
Application number
AT05291321T
Other languages
English (en)
Inventor
Bart Joseph Gerard Pauwels
Original Assignee
Alcatel Lucent
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Lucent filed Critical Alcatel Lucent
Application granted granted Critical
Publication of ATE392097T1 publication Critical patent/ATE392097T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/54558—Redundancy, stand-by
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/08—Indicating faults in circuits or apparatus
    • H04M3/12—Marking faulty circuits "busy"; Enabling equipment to disengage itself from faulty circuits ; Using redundant circuits; Response of a circuit, apparatus or system to an error

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Radio Relay Systems (AREA)
AT05291321T 2005-06-20 2005-06-20 Fehlertolerante schaltmatrix mit einer ebene für ein telekommunikationssystem ATE392097T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP05291321A EP1737253B1 (de) 2005-06-20 2005-06-20 Fehlertolerante Schaltmatrix mit einer Ebene für ein Telekommunikationssystem

Publications (1)

Publication Number Publication Date
ATE392097T1 true ATE392097T1 (de) 2008-04-15

Family

ID=35448247

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05291321T ATE392097T1 (de) 2005-06-20 2005-06-20 Fehlertolerante schaltmatrix mit einer ebene für ein telekommunikationssystem

Country Status (5)

Country Link
US (1) US20060285536A1 (de)
EP (1) EP1737253B1 (de)
CN (1) CN1885959B (de)
AT (1) ATE392097T1 (de)
DE (1) DE602005005974T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8335909B2 (en) 2004-04-15 2012-12-18 Raytheon Company Coupling processors to each other for high performance computing (HPC)
US8336040B2 (en) 2004-04-15 2012-12-18 Raytheon Company System and method for topology-aware job scheduling and backfilling in an HPC environment
US9178784B2 (en) 2004-04-15 2015-11-03 Raytheon Company System and method for cluster management based on HPC architecture
US7990853B2 (en) 2005-12-13 2011-08-02 Fujitsu Limited Link aggregation with internal load balancing
US8160061B2 (en) * 2006-12-29 2012-04-17 Raytheon Company Redundant network shared switch
US8144697B2 (en) 2007-01-12 2012-03-27 Raytheon Company System and method for networking computing clusters
US20080181196A1 (en) * 2007-01-31 2008-07-31 Alcatel Lucent Link aggregation across multiple chassis
WO2008146344A1 (ja) * 2007-05-25 2008-12-04 Mitsubishi Electric Corporation 光アクセスネットワーク
CN101272404B (zh) * 2008-05-15 2011-10-19 中国科学院计算技术研究所 一种p2p视频直播系统数据调度中的链路选择方法
US20090324243A1 (en) * 2008-06-30 2009-12-31 Lucent Technologies Inc. Scalable load-balanced interconnect switch based on an optical switch fabric having a bank of wavelength-selective switches
US20090324221A1 (en) * 2008-06-30 2009-12-31 Lucent Technologies Inc. Scalable load-balanced interconnect switch based on an arrayed waveguide grating
CN101854715B (zh) * 2010-06-29 2012-07-25 福建星网锐捷网络有限公司 一种实现主用设备与备用设备同步的方法、系统及装置
EP2437442B1 (de) * 2010-09-30 2013-02-13 Alcatel Lucent Vorrichtung und Verfahren zum Umschalten von Datenverkehr in einem digitalen Übertragungsnetzwerk
EP3462686B1 (de) 2011-08-17 2019-10-16 Nicira Inc. Verteiltes logisches l3 routing

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Publication number Priority date Publication date Assignee Title
CA2162939C (en) * 1994-12-30 2001-12-18 Thomas Jay Cloonan Terabit per second packet switch
US5978359A (en) * 1995-07-19 1999-11-02 Fujitsu Network Communications, Inc. Allocated and dynamic switch flow control
US6125111A (en) * 1996-09-27 2000-09-26 Nortel Networks Corporation Architecture for a modular communications switching system
US6052373A (en) * 1996-10-07 2000-04-18 Lau; Peter S. Y. Fault tolerant multicast ATM switch fabric, scalable speed and port expansion configurations
US6747971B1 (en) * 1999-04-20 2004-06-08 Cisco Technology, Inc. Crosspoint switch with independent schedulers
US6788701B1 (en) * 1999-05-14 2004-09-07 Dunti Llc Communication network having modular switches that enhance data throughput
US7002908B1 (en) * 2000-02-28 2006-02-21 Telefonaktiebolaget Lm Ericsson (Publ) Interconnection link redundancy in a modular switch node
DE10011267A1 (de) * 2000-03-08 2001-09-13 Tenovis Gmbh & Co Kg Kommunikationsmodul für den Busbetrieb sowie System mit mehreren Kommunikationsmodulen
WO2002013458A2 (en) * 2000-08-07 2002-02-14 Inrange Technologies Corporation Fibre channel switch
US6894970B1 (en) * 2000-10-31 2005-05-17 Chiaro Networks, Ltd. Router switch fabric protection using forward error correction
CA2357913A1 (en) * 2001-09-27 2003-03-27 Alcatel Canada Inc. System for providing fabric activity switch control in a communications system
US6711028B2 (en) * 2002-01-30 2004-03-23 Dune Networks Switching device and a method for the configuration thereof
US7366412B2 (en) * 2002-11-08 2008-04-29 Nortel Networks Limited Hybrid fine-coarse carrier switching
US7400629B2 (en) * 2002-12-19 2008-07-15 International Business Machines Corporation CAM based system and method for re-sequencing data packets
US7194661B1 (en) * 2002-12-23 2007-03-20 Intel Corporation Keep alive buffers (KABs)
US7688816B2 (en) * 2004-03-15 2010-03-30 Jinsoo Park Maintaining packet sequence using cell flow control

Also Published As

Publication number Publication date
EP1737253A1 (de) 2006-12-27
CN1885959B (zh) 2010-06-16
US20060285536A1 (en) 2006-12-21
CN1885959A (zh) 2006-12-27
EP1737253B1 (de) 2008-04-09
DE602005005974D1 (de) 2008-05-21
DE602005005974T2 (de) 2009-06-18

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