AT518466A3 - System und Verfahren zum Ausführen eines Nass-Ätzprozesses - Google Patents

System und Verfahren zum Ausführen eines Nass-Ätzprozesses

Info

Publication number
AT518466A3
AT518466A3 ATA9402/2015A AT94022015A AT518466A3 AT 518466 A3 AT518466 A3 AT 518466A3 AT 94022015 A AT94022015 A AT 94022015A AT 518466 A3 AT518466 A3 AT 518466A3
Authority
AT
Austria
Prior art keywords
etch
wafer
generate
etching step
profile
Prior art date
Application number
ATA9402/2015A
Other languages
English (en)
Other versions
AT518466A2 (de
Inventor
Maurer Laura
Taddei John
Clark John
Lawrence Elena
Kurt Zwimmann Eric
A Goldberg David
Yutkowitz Jonathan
Original Assignee
Veeco Precision Surface Proc Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Veeco Precision Surface Proc Llc filed Critical Veeco Precision Surface Proc Llc
Priority claimed from PCT/US2015/058302 external-priority patent/WO2016070036A1/en
Publication of AT518466A2 publication Critical patent/AT518466A2/de
Publication of AT518466A3 publication Critical patent/AT518466A3/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30608—Anisotropic liquid etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67075—Apparatus for fluid treatment for etching for wet etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67075—Apparatus for fluid treatment for etching for wet etching
    • H01L21/6708—Apparatus for fluid treatment for etching for wet etching using mainly spraying means, e.g. nozzles
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/17—Systems in which incident light is modified in accordance with the properties of the material investigated
    • G01N21/55—Specular reflectivity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)

Abstract

Es wird ein System und Verfahren zur Durchführung eines Nassätzprozesses offenbart. Das System umfasst mehrere Bearbeitungsstationen, die durch eine Übertragungsvorrichtung zugänglich sind, einschließlich einer Messstation, um die Dicke eines Wafers vor und nach jedem Ätzschritt im Prozess optisch zu messen. Das System umfasst auch einen Controller, um die Dickenmessungen im Hinblick auf ein Ziel-Wafer-Profil zu analysieren und dynamisch und in Echtzeit für jeden Ätzschritt ein Ätzrezept zu erzeugen. Zusätzlich kann die Prozesssteuerung eine einzelne Wafer-Nassätzstation veranlassen, den Wafer gemäß den erzeugten Ätzrezepten zu ätzen. Darüber hinaus kann das System, basierend auf den Vor- und Nach-Ätz-Dickenmessungen und dem Zielätzprofil, die Ätzrezepte erzeugen und/oder verfeinern.
ATA9402/2015A 2014-10-31 2015-10-30 System und Verfahren zum Ausführen eines Nass-Ätzprozesses AT518466A3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201462073706P 2014-10-31 2014-10-31
PCT/US2015/058302 WO2016070036A1 (en) 2014-10-31 2015-10-30 A system and method for performing a wet etching process

Publications (2)

Publication Number Publication Date
AT518466A2 AT518466A2 (de) 2017-10-15
AT518466A3 true AT518466A3 (de) 2019-07-15

Family

ID=60021547

Family Applications (1)

Application Number Title Priority Date Filing Date
ATA9402/2015A AT518466A3 (de) 2014-10-31 2015-10-30 System und Verfahren zum Ausführen eines Nass-Ätzprozesses

Country Status (1)

Country Link
AT (1) AT518466A3 (de)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060003566A1 (en) * 2004-06-30 2006-01-05 Ismail Emesh Methods and apparatuses for semiconductor fabrication utilizing through-wafer interconnects
US20110261371A1 (en) * 2010-03-12 2011-10-27 Precitec Optronik Gmbh Apparatus and Method for Monitoring a Thickness of a Silicon Wafer with a Highly Doped Layer
US20140242731A1 (en) * 2013-02-28 2014-08-28 Solid State Equipment Llc System and method for performing a wet etching process
WO2014172835A1 (en) * 2013-04-22 2014-10-30 Acm Research (Shanghai) Inc Method and apparatus for through-silicon vias reveal

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060003566A1 (en) * 2004-06-30 2006-01-05 Ismail Emesh Methods and apparatuses for semiconductor fabrication utilizing through-wafer interconnects
US20110261371A1 (en) * 2010-03-12 2011-10-27 Precitec Optronik Gmbh Apparatus and Method for Monitoring a Thickness of a Silicon Wafer with a Highly Doped Layer
US20140242731A1 (en) * 2013-02-28 2014-08-28 Solid State Equipment Llc System and method for performing a wet etching process
WO2014172835A1 (en) * 2013-04-22 2014-10-30 Acm Research (Shanghai) Inc Method and apparatus for through-silicon vias reveal

Also Published As

Publication number Publication date
AT518466A2 (de) 2017-10-15

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Legal Events

Date Code Title Description
REJ Rejection

Effective date: 20210515