WO2000052690A1

WO2000052690A1 - Digital signal recorder, reproducer and recording medium

Info

Publication number: WO2000052690A1
Application number: PCT/JP1999/000929
Authority: WO
Inventors: Manabu Sasamoto; Makoto Aikawa; Hiroo Okamoto; Takaharu Noguchi
Original assignee: Hitachi, Ltd.
Priority date: 1999-02-26
Filing date: 1999-02-26
Publication date: 2000-09-08
Also published as: US20080317436A1

Abstract

A recorder, a reproducer and a recording medium capable of protecting a copy right of a digital signal on a recording medium; specifically a digital signal recorder, a reproducer and a recording medium for recording or reproducing a digital signal onto or from a recording medium, wherein, at recording, a digital signal is encoded by a key obtained by performing a preset calculation on a key information and is recorded on a recording medium along with the key information, and at reproducing, a reproduced digital signal is decoded by the key reproduced from the recording medium and obtained by performing the preset calculation on the key information and is output.

Description

Specification

Digital signal recording device, playback device, and recording medium

The present invention relates to a digital signal recording device, a reproducing device, and a recording medium for recording and reproducing a digital signal on and from a recording medium, and particularly to a recording and reproducing device having a function of protecting the copyright of the digital signal on the recording medium. , And recording media. Background art

In recent years, research on data compression of video, audio, etc. using digital technology has progressed, and it has become easier to store and transmit such data. Along with this, digitization is also rapidly progressing in the broadcasting field.

For example, analog video signals and audio signals are converted to MPEG (Moving Picture

(Experts Group) A system is known in which digital compression coding is performed with high efficiency using the standard, and broadcast through a satellite or a coaxial cable. As a device for receiving this digital broadcast, there is a digital broadcast receiver called a set-top box.

As video and audio signal recording and playback equipment for home use, magnetic tape can be used to record and reproduce digital compression encoded video and audio signals, such as digital TV broadcasts, as digital signals. Digital

VTR is under development.

The digital broadcast receiver and digital VTR are connected by a digital interface, and can store received digital broadcasts with high quality. Japanese Patent Application Laid-Open No. Hei 8-56350 describes a technique for receiving a digital signal transmitted by multiplexing a plurality of pieces of information and selecting a desired program. Further, a digital VTR using a rotating magnetic head is described in, for example, Japanese Patent Application Laid-Open No. 5-174496.

Furthermore, regarding a digital broadcast recording system in which a digital broadcast receiver and a digital VTR are connected via a digital interface, I-II Transaction on Consumer Electr. , August 1996, pp. 6 17-6 22 (IEEE fransactions on Consumer Electronics, Vol. 42, No. 3, August 1996, p617-622 Factory Newly Developed D-VHS Digital Tape Recording System for the Multimedia Era ") ί this ΐ sheep properly stated latte Ru ₀

However, no consideration is given to the protection of the copyright of digital signals recorded on digital broadcasts recorded on digital VTRs.

An object of the present invention is to protect the copyright of a digital signal on a recording medium. Disclosure of the invention

The present invention relates to a digital signal recording device, a reproducing device, and a recording medium for recording or reproducing a digital signal on a recording medium, and at the time of recording, a digital signal is obtained by performing a predetermined operation on key information. The signal is encrypted and recorded on a recording medium together with the key information, and at the time of reproduction, the reproduced digital signal is reproduced with the key obtained by performing the predetermined operation on the key information reproduced from the recording medium. Decrypt and output. BRIEF DESCRIPTION OF THE FIGURES FIG. 1 is an embodiment of the present invention and is a configuration diagram including a digital broadcast receiver and a digital signal recording / reproducing device.

FIG. 2 is a block diagram of the digital signal recording / reproducing apparatus 200 of FIG. FIG. 3 is a configuration diagram of a bucket of a digital video compression signal.

FIG. 4 is a configuration diagram of the packet header 310 shown in FIG.

FIG. 5 is a configuration diagram of a digital broadcast transmission signal and a signal selected from the transmission signal.

FIG. 6 is a configuration diagram of the data encryption circuit 115 of FIG.

FIG. 7 is a configuration diagram of the encryptor 1155 in FIG.

FIG. 8 is a diagram showing the generation of a data key in the control circuit 104 showing an example of generating a data key to be supplied to the data encryption circuit 1 15 and the data decryption circuit 1 16 in FIG. .

FIG. 9 is a diagram showing a recording pattern of one track of the tape 111. As shown in FIG. FIG. 10 is a block diagram of the data recording area 7 of FIG. FIG. 11 is a configuration diagram of the ID information 21 of FIG.

FIG. 12 is a diagram showing the structure of one track of data in the data recording area 7 of FIG.

FIG. 13 is a block diagram of a one-packet when a digitally compressed video signal transmitted in a 188-byte bucket format is recorded as data 41 in FIG.

FIG. 14 is a configuration diagram of the header 44 of the data recording area 7 of FIG. 12, and FIG. 15 is a pack for storing a block key in the area of the additional information 47 of FIG. It is a data block diagram.

FIG. 16 is a diagram showing a method of storing a block key.

FIG. 17 is a diagram showing another storage method of the block key.

FIG. 18 is a specific configuration diagram of the time information 25 of FIG. FIG. 19 is a configuration diagram of the data decoding circuit 116 of FIG.

FIG. 20 is a block diagram of a digital recording / reproducing signal processing circuit 102 including the recording signal processing circuit 102a and the reproduction signal processing circuit 102b of FIG.

FIG. 21 is a diagram showing the timing of signal processing at the start of data recording.

FIG. 22 is a diagram showing key information on the tape 111 of FIG.

FIG. 23 shows the timing of signal processing during data reproduction.

FIG. 24 is another block diagram of the digital signal recording / reproducing apparatus 200 of FIG. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a configuration diagram including a digital broadcast receiver and a digital signal recording / reproducing device. Reference numeral 200 denotes a digital signal recording / reproducing device, reference numeral 201 denotes a digital broadcast receiving device, reference numeral 202 denotes an antenna, and reference numeral 207 denotes a receiver. Further, reference numeral 203 denotes a tuner, 204 denotes a selection circuit, 205 denotes a decoding circuit, 206 denotes an interface circuit, and 208 denotes control for controlling the operation of the digital broadcast receiver 201. Circuit. Here, the digital broadcast receiver 201 and the digital signal recording / reproducing device 200 are displayed as separate components, but may be integrated.

FIG. 2 is a block diagram of the digital signal recording / reproducing apparatus 200 of FIG. 1 ₍ FIG. 2 is a device for both recording and reproduction, but the same applies even if recording and reproduction are independent. 0 is a rotating head, 101 is a capstan, 102a is a recording signal processing circuit that generates a recording signal during recording, etc., and 102b is a reproduction signal during reproduction. A reproduction signal processing circuit for demodulating a raw signal, etc., 104 controls a recording / reproduction mode, etc., for example, a control circuit such as a microprocessor, 105, a rotation head 100, etc. A timing generation circuit that generates a timing signal that serves as a reference for reference, 106 is a servo circuit that controls the rotation head and tape feed speed, and 107 is a recording signal input or reproduction signal Input / output circuit for output, 109 is a timing control circuit that controls timing during recording, 110 is an oscillation circuit that generates a reference clock, 111 is a tape, and 112 is an analog Recording / playback circuit for video signals, 115 is a data signal circuit for recording digital signals, 116 is a data decoding circuit for playing digital signals, and 117 is for encrypting or decrypting digital information. To the data encryption circuit 115 or the data decryption circuit 116. A device key generator that generates a device key that is a source of a data key, and 118 is a block key that is another source of a data key used for decoding or decoding digital information. The generated block key generator 119 is an input / output control circuit for performing time-sampling processing on bucket data at the time of recording and controlling output of bucket data at the time of reproduction.

The digital video compression signal is data in a bucket format, and is transmitted by time-division multiplexing signals of a plurality of channels. In FIG. 1, a digital broadcast signal received by an antenna 202 is demodulated by a tuner 203, and then a necessary digital compressed video signal is selected by a selection circuit 204. The selected digitally compressed video signal is decoded into a normal video signal by the decoding circuit 205 and output to the receiver 200. Further, when a process such as scrambling is performed on the received signal, a decoding process is performed after canceling it in the selection circuit 204. When recording the received digital broadcast signal, the digital compression video signal to be recorded and the information related thereto are selected in the selection circuit 204, and the interface circuit 204 is selected. The signal is input to the digital signal recording device 200 from the input / output terminal 108 of the digital signal recording / reproducing device 200 via 6, and is recorded. When playing back the recorded digital broadcast signal, the digital compressed video signal played back by the digital signal recording / playback device 200 is sent from the input / output terminal 108 to the interface circuit 206. Is output to Interface circuit

The digitally compressed video signal and the like input to 206 are processed by the selection circuit 204 and the decoding circuit 205 in the same way as in normal reception, and

Output to 7.

In FIG. 2 showing the configuration of the digital signal recording / reproducing apparatus 200 shown in FIG. 1, during recording, part of the bucket data input from the input / output terminal 108 is converted to the input / output circuit 107. Is input to the control circuit 104 via the. The control circuit 104 detects the type of packet data and the like based on the information added to the packet data or the information transmitted separately from the packet data, determines the recording mode based on the detection result, and records. Set the operation mode of the signal processing circuit 102a and the servo circuit 106. Next, the input / output circuit 107 outputs the bucket data to be recorded to the data encryption circuit 115. In the overnight encryption circuit 115, data is input by a data key generated in the control circuit 104 based on the keys generated by the device key generator 117 and the block key generator 118. The bucket data is encrypted and output to the input / output control circuit 119. The input / output control circuit 119 applies a time stamp to the input bucket data based on the time information from the timing generation circuit 105, and outputs this to the recording signal processing circuit 102a. You. In the recording signal processing circuit 102a, according to the recording mode determined by the control circuit 104, the recording data including the error correction code, the ID information, the subcode, the block key information used for the encryption, etc. Generate and generate a recording signal and record it on the tape 111 with the rotating head 100. At the time of reproduction, the reproduction operation is first performed in an arbitrary reproduction mode, and ID information is detected by the reproduction signal processing circuit 102b. Then, the control circuit 104 determines which mode is used for recording, and the reproduction mode is performed by resetting the operation mode of the reproduction signal processing circuit 102b and the servo circuit 106. The reproduction signal processing circuit 102b detects the synchronization signal, detects and corrects errors, acquires block key information, etc. from the reproduction signal reproduced from the rotating head 100, reproduces the packet data, and inputs / outputs the packet data. Output to control circuit 1 19. The input / output control circuit 119 outputs to the data decoding circuit 116 the packet data from which the time stamp has been removed based on the timing generated by the evening generation circuit 105. The data decryption circuit 116 uses the key generated by the device key generator 117 and the block key obtained by reproduction to generate the data generated in the control circuit 104. The data is decrypted by the key and output to the input / output circuit 107.

At the time of recording, the operation timing of the recording / reproducing apparatus is controlled by the timing control circuit 109 based on the rate of the recording data input from the input / output terminal 108, and at the time of reproduction, the oscillation circuit 110 It operates based on the clock oscillated by

FIG. 3 is a configuration diagram of a packet of a digital video compression signal. One packet is composed of a fixed length, for example, 188 bytes, and is composed of a 4-byte packet header 306 and a 184-byte packet information 307. . The digital compressed video signal is arranged in the area of the packet information 307. The packet header 307 includes information such as the type of packet information.

FIG. 4 is a configuration diagram of the bucket header 310 shown in FIG. 501 is a sync byte indicating the beginning of the packet, 502 is an error display indicating the presence or absence of an error, 503 is a unit start display indicating the start of a unit, and 504 is a packet start unit. Packet priority indicating importance, 505 indicates a packet ID indicating the type of packet, 506 indicates scrambling control indicating whether or not scrambling is performed, and 507 indicates whether there is additional information and whether there is packet information. The adaptation field control shown, 508 is a cyclic counter that counts up in packet units.

FIG. 5 is a configuration diagram of a digital broadcast transmission signal and a signal selected from the transmission signal. 71 is the bucket in Fig. 3. Usually, an audio signal, information on a program, and the like are added to the video signal, and a program of a plurality of channels is transmitted in a time-division multiplexed manner.

Fig. 5 (a) shows an example of multiplexing three-channel programs. V1, V2, and V3 are the video signals of each channel, and A1, A2, and A3 are the audio signals of each channel. Bucket of signal. It should be noted that the video or audio may be composed of a plurality of video or audio in one channel. P0, P1, P2, and P3 are information about the program. Each packet is assigned a different packet ID505 so that the contents of the bucket can be identified.

P0 is information on the entire transmission signal in FIG. 5 (a), and includes information such as a program association table and program guide information for recognizing which packet ID is assigned to each program. The bucket is time-division multiplexed and transmitted. P1, P2, and P3 are information on each program, and include a program map table for recognizing which packet ID is assigned to a video packet, an audio packet, and the like of the channel. Buckets such as scramble information are transmitted in a time-division multiplexed manner. Normally, the packet ID of the program association table is assigned a fixed value, for example, 0.

At the time of reception, first receive using the program association table It recognizes which bucket ID is assigned to the program map table of the program to be received, and then assigns which bucket ID to the video bucket, audio bucket, etc. according to the program map table of the program to be received. Recognize that Then, the video packet and the audio packet are extracted and the digitally compressed data is decoded. At the same time, the program clock reference is extracted, thereby controlling the operation of the decoding circuit so that the decoding timing of the decoding circuit for digital compressed data is synchronized with the timing at the time of encoding.

CR is program clock reference information for synchronizing digital compressed data at the time of decoding.

Of course, the number of channels to be multiplexed may be other than three, for example, four, or other information may be multiplexed.

FIG. 5 (b) is a selection of only the information of the first channel and the program information related thereto from FIG. 5 (a). When recording the first channel, this information is output from the digital broadcast receiver 201 to the recording / reproducing device 200. Of course, other information may be recorded, and a part of the bucket information may be changed in order to facilitate the processing at the time of reproduction. For example, if the information in the program association table is changed to the information only for the program that records the information, there is no need to select a channel during playback.

FIG. 6 is a configuration diagram of the data encryption circuit 115 of FIG. 1 1 5 1 is the packet data input terminal, 1 1 5 7 is the packet data output terminal, 1 1 5 3 a, 1 1 5 3 b is the data key input terminal, 1 1 5 3 c is the data key selection signal input terminal, 1 1 5 3 d is a processing mode selection signal input terminal, 1 1 5 2 and 1 1 5 6 are block processing circuits, 1 1 5 4 is a key schedule circuit, 1 1 5 5 is an encryptor, 1 1 5 8a, 1 1 5 8b are data key registers, 1 1 5 9 are data Key selector. The data encryption circuit 115 encrypts the data in a bucket data unit using a predetermined data key and outputs the encrypted data. At this time, by changing the data key at certain time intervals, the security of the packet data recorded on the tape can be improved.

For example, even if an error such as a bit error occurs during transmission, the encryptor 1155 can transmit a plurality of bits so that the error does not affect subsequent data, that is, there is no error transmission. The block No. which can realize the No. processing with a simple circuit configuration is used for the block consisting of blocks.

First, the packet data input from the input terminal 1151 is divided into a block P consisting of a plurality of bits in the block processing circuit 1152. For example, one block has 64 bits. Each block is sequentially encrypted in the encryptor 115, and as a result, the block C is output. In the block processing circuit 115, the block is returned to the bucket data format, and the output terminal 1 is output. Output to 1 5 7 Here, the data key, which is a key for encryption, is input from the data key input terminals 1 1 5 3a and 1 1 5 3b from the control circuit 104, and the data key register 1 1 5 8a, Stored in 1 1 5 8 b. For example, the data key register 1158 a records the current data key, and the data key register 1158 b records the next data key to be switched.

Also, from the data key selection signal input terminal 1153 c, a signal indicating which data key of the data key register 1158 a or 1158 b is to be selected from the control circuit 104. The data key is input, and the selected data key is output by the data key selector 1 159. Here, it is assumed that, for example, the data key of the key register 1158a is selected. The selected data key is converted into sub-keys KA and KB in the scheduler circuit 115, and is supplied to the encryptor 115. For example, data key length 56 bits, subkey The length of each key is 32 bits, the upper 32 bits of the data key are allocated to KA, and the sum of the upper 32 bits and lower 32 bits of the data key is allocated to KB.

Here, when the data key is changed, a signal is input from the control circuit 104 to the data key selection signal input terminal 1153 c so as to output the data key register 111 58 b. The data key selector does not switch the selected output until all blocks in one bucket have been encrypted, and controls to switch to the next bucket.

In addition, for example, there is a method of increasing the encryption strength by performing an exclusive OR operation on the output of the encryption device 1155 and the input of the encryption device 1155, and applying feedback in block units.

FIG. 7 is a configuration diagram of the encryptor 1155 in FIG. In the figure, 551, 552, 553, 554 are the cryptographic processing units, Pa and Pb are the upper and lower bits of the input block data P, and Ca and Cb are the symbols The coded data, KA and KB, are subkeys. As shown in the figure, for example, an input 64 bit block P is separated into its upper 32 bits Pa and its lower 32 bits Pb. The P a and P b are subjected to an exclusive OR (55511), a bit shift and an addition operation (55512, 51513, 51515: A) in the cryptographic processing unit 551. <<<p indicates that A is to be cyclically shifted bitwise to the left by p bits), an addition operation (51514, 51516) is performed, and the result is processed by the cryptographic processing unit 55 Subsequent cryptographic processing units 552, 553 that perform the same processing as 1 and input to a cryptographic processing unit (not shown) to perform a multi-stage repetition operation and output by the final-stage cryptographic processing unit 554 The encrypted block C is obtained from the encrypted data C a and C b.

Although the data encryption circuit 115 shown in FIGS. 2 and 7 has been described above, the data decryption circuit 116 shown in FIG. 2 operates in the reverse flow of the encryption device 115. By doing so, it is possible to decrypt the encrypted block. However, the operation 5 5 16 in FIG. 7 is a subtraction process. Of course, the same sub-keys KA and KB must be used as in encryption.

In other cases, there is no need to protect the bucket data to be recorded, for example, if the program to be recorded is allowed to be copied freely, or the packet data may be recorded on tape without encryption. is there. This can be realized, for example, by switching between the function of decoding and decrypting the input bucket and the function of passing through the data encryption circuit 115 and the data decryption circuit 116 without doing anything. In the data encryption circuit 115 shown in FIGS. 2 and 6, the processing mode selection signal input through the processing mode selection signal input terminal 115 d shown in FIG. Although not shown, the input X 5 to the operation 5 δ 16 in the figure is fixed to zero so that the block can be passed without performing the 喑 sign and the decoding process. According to this method, the operation can be switched while keeping the passage delay time of the input packet constant. Although not shown, as another method, the packet data input from the input terminal 1151, the block processing circuit 1152, the encrypter 1155, and the block processing circuit 1156 are used. The output terminal 1 1 5 is a switching circuit that switches between the output to the output terminals 1 1 5 7 and the bucket data output from the block processing circuit 1 1 5 6 to the output terminals 1 1 5 7 without intervening. 7, a processing mode selection signal input via the processing mode selection signal input terminal 1153 d is input to the switching circuit, and a bucket output from the block processing circuit 1156 is provided. There is also a method to switch between bucket data or bucket data input to input terminals 1157. These methods can also be realized with the same configuration as described above in the data decoding circuit 116 of FIGS. 2 and 19.

FIG. 8 shows the data encryption circuit 1 15 and the data decryption circuit 1 16 shown in FIG. FIG. 4 is a diagram illustrating generation of a data key in a control circuit 104 showing an example of generating a data key to be supplied. The device key generator 117 stores, for example, 96 bits of predetermined fixed key information. The block key generator 118 is a random number generator that generates a 96-bit random number in accordance with a command 111 from the control circuit 104 in FIG. 2, for example. 12 0 is a 96-bit exclusive OR operator, and 12 1 is a hash function operator. In FIG. 8 (a), the block key and the device key are exclusive-ORed by the exclusive-OR calculator 120, and the hash function is calculated by the hash function calculator 122. The 56 bits of the selected result are supplied to the data encryption circuit 115 of FIG. 2 as a data key. The hash function is a function whose input data is difficult to guess from the output result, and the block key and device key that are secret information cannot be obtained from the data key.

In addition, a command 111 from the control circuit 104 of FIG. 2 is generated at a certain time interval, and the de-key is successively changed by repeatedly generating the de-key by the above-described operation. And the security of the data on the recording medium can be improved. Next, the block key (K r) generated by the block key generator 118 is sent to the recording signal processing circuit 102 a in FIG. 2 and is recorded on the tape 111.

At the time of playback, instead of the block key generated by the block key generator 118, the same operation as above is performed using the block key (Kp) reproduced from the tape 111 to obtain the data key. Are supplied to the data decoding circuit 116 shown in FIG.

FIG. 8 (b) shows an example in which as a key information K r to be recorded on the tape 111, an exclusive OR of a block key and a device key is used. In this case, the block key itself is input to the hash function calculator. At the time of playback, instead of the block key in Fig. 8 (a), The same operation as above is performed using the Kp reproduced from the above, a data key is obtained, and the data key is supplied to the data decryption circuit 116.

Next, the method of recording on tape will be described.

FIG. 9 shows a recording pattern of one track. 3 is a subcode recording area for recording subcodes such as time information and program information, 7 is a data recording area for recording digital compressed video signals, 2 and 6 are preambles of the respective recording areas, 4 and 8 is the postamble of each recording area, 5 is the gap between each recording area, and 1 and 9 are the margins at the track ends. By providing the postamble, preamble, and gap in each recording area in this way, it is possible to perform dubbing on each area independently. Of course, the recording area 7 may record a digital signal other than the digital compressed video signal. The data recording area 7 is composed of a plurality of blocks (different from the above-described block which is a small unit of encryption).

FIG. 10 is a block diagram of the data recording area 7 of FIG. 20 is a synchronization signal, 21 is ID information, 22 is data, and 23 is parity (C1 harity) for the first error detection and correction. For example, the sync signal 20 is composed of 2 bytes, the ID information 21 is composed of 3 bytes, the data 22 is composed of 99 bytes, the parity 23 is composed of 8 bytes, and one block is composed of 1 1 It consists of 2 bytes.

FIG. 11 is a configuration diagram of the ID information 21 of FIG. 3 1 is the group number, 3 2 is the track address, 3 3 is the block address in one track, 35 is for detecting errors in the group number 31, track address 3 2 and block address 3 3 Parity. The block address 33 is an address for identifying a block in each recording area. For example, in the data recording area 7 in FIG. Track add The address 32 is an address for identifying a track. For example, the address can be changed in units of one track or two tracks, and n tracks can be identified. For example, by setting 0 to 5 or 0 to 2, 6 tracks can be identified. The group number 31 in FIG. 11 is changed, for example, in units of six tracks identified by the track address 32, and is set to 0 to 15 to identify 96 tracks. If the track address 32 is synchronized with the cycle of a second error correction code described later, processing at the time of recording and identification at the time of reproduction can be facilitated. FIG. 12 is a diagram showing the structure of one track of data in the data recording area 7 of FIG. The synchronization signal 20 and the ID information 21 shown in FIG. 10 are omitted. The data recording area 7 is composed of, for example, 336 blocks. Data 41 is stored in the first 310 blocks, and a second error correction code (C2 parity) 4 3 is stored in the next 30 blocks. Record The C2 parity 43 is configured in units of n tracks, for example, in units of 6 tracks. When viewed in units of 6 tracks, the data is data of 30 blocks × 6 tracks, and the data is divided into 18 blocks, and each block is divided into 102 blocks, and the C 2 of 10 blocks Add parity. For example, a lead solomon code may be used as the error correction code. Each block of 99 bytes of data is composed of a 3-byte header 44 and a 96-byte data 41.

Fig. 13 shows the configuration of a 1-packet when a digitally compressed video signal transmitted in a 188-byte packet format is recorded as data 41 in Fig. 12. It is an example. In this case, four bytes of time information 25 are added to make 192 bytes, and one bucket is recorded in two blocks. Time information 25 is information on the time when the bucket was transmitted. That is, the time when the head of the bucket is transmitted or the interval between buckets is counted by the reference clock, and the count value is recorded together with the packet data, and is reproduced. Sometimes, by setting the interval between buckets based on that information, data can be output in the same form as when it was transmitted.

FIG. 14 is a configuration diagram of the header 44 of the data recording area 7 in FIG. The header 44 is composed of format information 45, block information 46, and additional information .47. Various recording information related to recording is recorded in the format information 45 and the block information 46, and other auxiliary information is recorded in the additional information 47.

The format information 45 is information relating to the recording format, and includes a recording mode (standard speed mode and other identification), a type of bucket data to be handled, and whether or not the recorded bucket data can be copied. Information such as copy restriction information indicating whether or not is stored is stored, and one block is composed of a plurality of blocks. For example, one piece of information is composed of 12 bytes of 12 blocks. By repeatedly multiplex-recording this information a plurality of times, the detection capability at the time of reproduction is improved. Here, it is also possible to record the above-mentioned key information and the like.

The block information 46 is information for identifying the type of data recorded in the data recording area 41. Here, the presence / absence and type of high-speed variable-speed playback data (which speed corresponds to the high-speed variable-speed playback data) are recorded. Here, it is also possible to record the above-mentioned key information and the like.

The additional information 47 consists of, for example, six blocks of six bytes, which constitute one piece of information, that is, a piece of data. Thus, various kinds of data can be recorded. For example, key information such as the above-mentioned block key, other information such as recording time, the type of recording signal, and the like can be recorded here. FIG. 15 is a configuration diagram of the pack data when the block key is stored in the area of the additional information 47 in FIG.

The first byte of the pack data stores an item information code indicating that the subsequent information is key information.

In the second byte, information indicating the type of the stored key (key sequence number, key attribute, key flag) is recorded. As described above, by sequentially changing the block key at certain time intervals, the security of data on the recording medium can be improved. The key attribute information indicating whether the block key stored in the block is the block key used for encrypting the current bucket data or the block key used next is recorded. In addition, the switching timing is recorded with a key flag that is inverted each time the block key is updated. With this information, switching of keys during reproduction is made smooth. Also, if a pack key cannot be stored in one pack, information indicating that there is a subsequent pack is stored in the key sequence number. For example, if the lock key is 96 bits, it is divided into three packs and stored, and each key sequence number stores 2, 1, and 0, and 0 is the last pack Is shown. In addition, there are people who store the size of the entire data and know the remaining size.

The block key is stored in the third to sixth bytes.

In the example shown in FIG. 8 (b), the key information Kr is stored instead of the block key.

FIG. 16 is a diagram showing a method of storing a block key. In this example, only the current key information is recorded in the pack data of each track. Therefore, the above-mentioned key attribute is fixed information indicating only the current key, and need not be recorded. In the figure, (1) shows a state in which the 96-bit current block key A (A0 to A11) is divided into three packs and stored. Normally, these packs are recorded multiple times on one track to improve the reliability of the data. For example, by recording three packs in the first, middle, and last areas of the track (a total of nine), the effects of missing reproduced signal bursts due to clogged magnetic heads, etc. Can be reduced. Also, it is not necessary to record the three packs as consecutive packs, but insert a pack containing other information between each pack, and record the packs storing key information in a distributed manner. Thus, the key information itself can be protected, and the reliability is further improved. Fig. 2 (2) shows the packed data recorded on the track whose block key has been switched to B. In this case, the key flag of block key B is inverted.

FIG. 17 is a diagram showing another method of storing a block key. Fig. 17 shows a method for generating and recording the key information to be used next along with the current key information. Here, the key attribute information is “0” for the block key used for encrypting the current bucket data, and “1” for the next block key. Also, the key flag that is inverted each time the block key is updated alternates between "0" and "1".

In the figure, (1) shows a state where the 96-bit current block key A is stored. In (2), the next block key B is stored. These (1) and (2) are recorded in the additional information area of the block in the same track. (3) is the pack data recorded on the track whose block key has been switched to B. In this case, the block key B is the current key of the key attribute information "0", and the key flag is also inverted. In (4), the key C to be used next is stored. (3) and (4) are recorded on a track as pack data in the same track.

The storage location of the key flag indicating the update timing of the block key is stored in the pack of the additional information 47 as well as in the format shown in FIG. There is also a method of storing the information in mat information 45 or block information 46. As described above, the key information is recorded on the tape, but the timing for switching the block key is n track (the 6 track in this embodiment), which is the unit for adding the C2 parity described above. By setting a break in parentheses, C2 parity calculation can be performed during playback, and the data reliability of key information is improved.

In addition, in the above example, the information indicating the timing at which the lock key is updated is recorded as a key flag. In the recording signal processing circuit 102a shown in FIG. By synchronizing the value of the track address 32 or the group number 31 with the C2 parity calculation cycle and update timing, the key information during playback can be obtained without recording a key flag. Update timing can also be detected by the value of the track address 32 or the group number 31. For example, in the recording signal processing circuit 102a shown in FIG. 2, the track address 32,, and the value 0 to 5 are repeated for each track, and the six values 0 to 5 are repeated. A track is a unit for adding the above-mentioned C2 parity. Then, in the evening when the value changes from 5 to 0, the data encryption circuit 115 updates the block key and records it. At the time of reproduction, the reproduction signal processing circuit 102b shown in FIG. 2 detects the timing when the value of the track address 32 becomes 5 to 0, and the data decoding circuit 110b in FIG. The key should be updated. When updating at a longer period, for example, when the value of the track address 3 2 is changed from 5 to 0 using the group number 31, the group number 31 is increased by 1 and the group address 31 is increased from 0 to 1 By repeating the value of 5, it becomes possible to detect the update timing in units of 96 tracks, and at the break of the unit for adding C2 parity.

Fig. 18 shows the specifics of the time information 25 (4 bytes = 32 bits) in Fig. 13. This is an example of a typical configuration, and shows another method of storing a key flag and an encryption flag. Here, for example, the time information 25 1 is 22-bit information, 25 2 is the key flag (1 bit) described above, and 25 3 is the following packet data is encrypted. This is an encryption flag (1 bit) that indicates whether or not there is a password. At the time of recording, the input / output control circuit 1 19 in FIG. 2 sets the encryption flag 25 3 together with the time information 25 1 which is a time stamp to the encryption flag 25 3 if the following packet data is encrypted. “1” is stored if not encrypted, and “0” is stored if not encrypted. The key flag 2 52 is a key flag of the pack data that stores the above-mentioned key information corresponding to the subsequent packet data. Is stored. At the time of reproduction, the input / output control circuit 1 19 shown in FIG. 2 removes the time information 25 added at the time of recording and outputs it to the data decryption circuit 1 16 as well as the encryption flag 2 5 3 and the key flag 2 5 2 Is supplied to the data decoding circuit 116 to control the operation of the data decoding circuit 116.

FIG. 19 is a configuration diagram of the data decoding circuit 116 of FIG. 1 16 1 is the packet data input terminal, 1 16 7 is the packet data overnight output terminal, 1 16 3 a and 1 16 3 b are the data key input terminals, and 1 16 3 c is the data key selection signal. Input terminal, 1 16 3 d is a processing mode selection signal input terminal, 1 16 2 and 1 16 6 are block processing circuits, 1 16 4 is a key schedule circuit, 1 16 5 is a decoder, 1168a and 1168b are data key registers, and 1169 is a data key selector. The data decryption circuit 116 decrypts the data in units of the input bucket data using a predetermined data key and outputs the result.

The decoder 1165 uses a block No. which realizes a decoding process in units of a block composed of a plurality of bits.

The bucket data input from the input terminal 1 16 1 is divided into a block C consisting of a plurality of bits, as in the data encryption circuit 1 15. The blocks are sequentially decoded in the decoder 1165, and as a result, a block P is output. In the block processing circuit 1166, the data is returned to the bucket data format and output to the output terminal 1167. Here, the decryption key, which is a key for decryption, is inputted from the data key input terminals 1 16 3 a and 1 16 3 b from the control circuit 104, and the decryption key Stored in 1668a and 1168b. For example, the current data key is recorded in the data key register 1168a, and the data key to be switched next is recorded in the data key register 1168b.

Also, from the processing mode selection signal input terminal 1 16 3 d, the encryption flag 2 53 detected from the input / output control circuit 1 09 is input, and the decryption mode of the decryptor 1 1 6 5 is determined. Decide which mode to pass without doing anything. In addition, from the data key selection signal input terminal 1 1 6 3 c, the input / output control circuit 1

0 The key flag 2 5 2 detected from 9 is input and the data key selector 1 1 6

According to 9, the selected data key is output. The selected data key is converted into sub-keys K A and K B in the scheduling circuit 116 and supplied to the encryptor 116.

Here, when the encryption flag or the key flag detected by the input / output control circuit 119 of FIG. 2 changes, the operation mode of the data decoder 116 and the selection of the data key are interlocked with the change. Is performed.

As described above, by adding an encryption flag and a key flag to each bucket data, the presence or absence of encryption, determination of key information, and decryption processing in bucket data units can be realized.

In addition, as a storage location of the encryption flag indicating whether or not the key information is encrypted, a method of storing the key information shown in FIG. 15 in the second byte of the pack, or the method of FIG. There is also a method of storing it in the format information 45 and the block information 46 shown in (1). By storing the encryption flag in the format information 45 or the block information 46, for example, when the encryption flag indicates "1", that is, when the bucket data is encrypted, the data decryption circuit 1 The operation of 16 is a decryption operation, and the key information is obtained from the pack storing the key information of the additional information 47. If the encryption flag is “0”, the operation of the data decryption circuit 1 16 Is output without decryption, the control operation when the packet data is not encrypted can be simplified. In the method of storing the encryption flag in the pack storing the key information, if the encryption flag is "0", that is, if the bucket data is not encrypted, the block key of the third and subsequent bytes of the pack is stored. No information is stored. In addition, it is also possible to determine whether or not encryption has been performed by using, for example, the presence or absence of a pack for storing key information without using an encryption flag.

FIG. 20 is a block diagram of a digital recording / reproducing signal processing circuit 102 including the recording signal processing circuit 102a and the reproduction signal processing circuit 102b of FIG. 400 is a memory circuit, 401 is a memory control circuit that generates an address for controlling the memory circuit 400 in accordance with the control circuit 104 in FIG. 2, 400 is a C2 parity operation circuit, 403 is a C1 parity operation circuit, and 404 is additional information such as ID information, subcode generation, format information, block information, and key information at the time of recording according to the settings from the control circuit 104. , And an additional information processing circuit that acquires additional information such as ID information, subcode, format information, block information, and key information during playback, etc.405 is a modulation process during recording and demodulation during playback This is a modulation / demodulation circuit that performs processing. In the present embodiment, as an example, C 2. The memory circuit 400 must have a capacity to accumulate data for at least six tracks because six tracks of data are required to perform the parity operation.

At the time of recording, the control circuit 104 shown in Fig. 2 is connected via terminals 411 and 413. Is set to the recording state. The bucket data encrypted by the data encryption circuit 115 in FIG. 2 is input from the terminal 410 and stored in the memory circuit 400 in accordance with the control signal of the memory control circuit 401. After data necessary for the C2 parity operation is accumulated, the data is sequentially read from the memory circuit 400 and input to the C2 parity operation circuit 402, where a predetermined operation is performed. The operation result obtained by the C2 parity operation circuit 402 is stored in the memory circuit 400. On the other hand, in accordance with the setting from the control circuit 104 in FIG. 2 via the terminal 413, the additional information processing circuit 404 outputs key information and the like corresponding to the input encrypted packet data key. Pack data is generated and stored in the memory circuit 400. Further, as constituting the above-described recording protocol, the data read from the memory circuit 400 including the key information and the like is added with the C1 parity by the C1 parity operation circuit 403, Input to the modulation and demodulation circuit 405. The signal subjected to predetermined modulation processing by the modulation / demodulation circuit 405 is output via a terminal 414, and the recording / reproducing amplifier 116 of FIG. 2 and the tape 110 via a rotary head 100 shown in FIG. Recorded above.

FIG. 21 shows the timing of signal processing at the start of data recording. Fig. 21 (a) shows the packet data input from the data encryption circuit 115, and Fig. 21 (b) shows the data key used by the data encryption circuit 115 for encryption. Fig. 21 (c) shows the same two-parity calculation in the C2 security operation circuit 402 in Fig. 20 in accordance with the above-mentioned C2 security 43, 6-track unit configuration. An arithmetic cycle (6 tracks in this embodiment) is shown, and FIG. 21 (d) shows a recording signal to be recorded on the tape 111 via the rotating head 100. In the embodiment shown in FIG. 21, a block key A is generated in advance before the time t 1 at which recording is set, a data key Ka is calculated, and the calculated data key Ka is supplied to the data encryption circuit 115. Keep it. Before the recording start time t 1, the recording signal processing circuit 102 a receives the packet regardless of the input signal. Control is performed so that recording signal processing is performed assuming that there is no cut. As a result, even when the recording start is set at the time t0, it is possible to calculate the C 2 parity for the data in the period p0.

The control circuit 104 in FIG. 2 terminates the C2 parity operation cycle s0 of the input data when recording is started at time t0, and constitutes the second error correction code n The recording signal is output from the beginning of the track (6 tracks in this embodiment) (Fig. 21 (d)). The data key is updated in the operation cycle of this C2 authority. For example, a block key B is generated before time t2, a data key Kb is calculated and supplied to the data encryption circuit 115, and at time t2, the data encryption circuit 111 is generated. In step 5, switch the data key to Kb. Normally, the data encryption circuit 115 generates a delay time between the input and output of bucket data due to the processing. Therefore, at time t2, at a point in time before the data delay time generated by the data encryption circuit 115 encrypting the packet from the time t2, the decryption key supplied to the data encryption circuit 115 is determined. Switch to K b. Alternatively, the bucket data whose de-key has been switched may be postponed to the next operation cycle. In this embodiment, extra data is recorded at the beginning, but regardless of the timing of the recording start time t 1, C 2 、 and リティ are added to the signal to be recorded, It can be recorded in the above C2 parity operation cycle unit. At the time of reproduction, the extra data at the beginning is recorded as if there is no bucket, so it is only used for C2 parity operation and is not output.

At the end of recording, the recording operation of the recording / reproducing signal processing circuit 102a on the tape 111 is calculated using data of a plurality of tracks. C2 parity calculation cycle (6 tracks in this embodiment) The control is performed by the control circuit 104 so as to be completed. With this control method, recording start and end Regardless of the switching timing, all recorded data on tape 1 1 1 is C 2 c. Key information is updated in units of C2 parity operation cycles, and the packet data is encrypted.Therefore, during playback, playback can be performed in units of C2 parity operation cycles, and C2 parity operations can be performed. Also, the data reliability of key information is improved.

FIG. 22 is a diagram showing key information on the tape 111 of FIG. In the figure, 1 1 1 1 to 1 1 1 7 are C 2 nodes. This is a recording track indicated in units of 6 tracks, which is the cycle of the arithmetic operation. In the case of this figure, recording tracks 1 1 1 1 to 1 1 13 are encrypted based on block key A, and recording tracks 1 1 1 4 to 1 1 16 are encrypted based on block key B. Packet data and pack data, which is key information corresponding to them, are stored. In addition, the recording track 111 is a track recorded without encryption. As shown in this figure, encrypted tracks and unencrypted tracks can be mixed on the same tape. The key information is updated, for example, for each mxn track (m is an integer of 1 or more, n is 6 in the present embodiment), or for the entire program of one track, for example, 48 tracks, 96 tracks, etc. However, a key switch or a boundary between an encrypted track and an unencrypted track is a boundary of a C2 parity operation cycle (6 tracks in the present embodiment).

The operation at the time of recording has been described above. Here, it is possible to record the key information in the sub-code area (7 in FIG. 9), but the key information is stored in the header (44 in FIG. 12) of each block. However, by recording the data on each track in the evening storage area (7 in Fig. 9), it is difficult to rewrite only the key information by post-recording or the like. Therefore, it is possible to prevent the loss of the key information, and it is not possible to intentionally falsify only the key information and intentionally perform encrypted communication. Next, a method of reproducing from a tape will be described.

In the digital recording / reproducing signal processing circuit 102 of FIG. 20, at the time of reproduction, the reproduction state is set by the control circuit 104 of FIG. 2 via the terminals 4 11 and 4 13. . The reproduced signal reproduced from the tape 111 from the rotary head 100 and input from the terminal 414 is subjected to demodulation processing by the modulation / demodulation circuit 405 and then to the C1 parity operation circuit 405. 3 performs C 1 C ⁰ utility computing, performs error detection and correction thereof, also C 1 parity calculation result is stored in the memory circuit 4 0 0 together. After the data necessary for the C2 parity operation is accumulated, the data is sequentially read from the memory circuit 400 in accordance with the control signal of the memory control circuit 401, and is input to the C2, temperature operation circuit 402. You. The C2 parity operation circuit 402 performs an operation on the above data, and stores the data subjected to error detection and correction processing and the C2 parity operation result in the memory circuit 400 again.

The data is read out from the memory circuit 400 in a predetermined order with reference to the timing signal input from the timing generation circuit 105 of FIG. , And outputs only error-free data from the terminal 410 to the input / output control circuit 119 of FIG. On the other hand, the additional information processing circuit 404 obtains key information and subcode from the data read from the memory circuit 400 and sends it to the control circuit 104 of FIG. 2 via the terminal 413. I do. After that, Kp is extracted from the key information obtained by the operation shown in FIG. 8, that is, the reproduction, and the exclusive-OR with the device key from the device key generator 117 is taken. The data key is obtained by performing the operation of the function 121 and output to the data decryption circuit 116 shown in FIG. This data key is the same as the data key used at the time of recording, and the original packet data can be correctly obtained in the data decryption circuit 116. FIG. 23 is a diagram showing the timing of signal processing during data reproduction according to the present invention. FIG. 23 (a) is a reproduction signal reproduced from the tape 111 via the rotating head 100, and FIG. 23 (b) is a calculation cycle of the above C2 parity (in this embodiment, 6 traverses). FIG. 23 (c) shows the bucket data output from the input / output control circuit 119, and FIG. 23 (d) shows the bucket data output from the data decoding circuit 111 in FIG. Figure 4 shows the supplied data key. In the additional information processing circuit 404, in the operation cycle s3, the key information K p C used in this cycle is detected. The data key K c obtained by the above-described calculation using K p C is stored in, for example, the above-mentioned data key register 1 1 6 3 a. The data key selector 1 1 6 9 is also stored in the data key register 1. The data key K c of 16 3 a has been selected to be output.

Next, in the operation cycle s4, when it is detected that the key information KpD is used, the data key Kd is obtained in advance by the above-described operation, and the data key register 1 1 In the evening of the time t3, the data key selector 1169 is controlled to switch to the data key Kd of the data key register 1163b. By the above method, the reproducing operation can be performed while updating the data key.

In addition, when additional recording is performed on a tape that has already been recorded, recording is started from the break of the C2 parity addition unit, thereby impairing the data reliability of the key information of the track immediately before the additional recording. Connection recording is possible.

As another method for distinguishing whether the bucket data is encrypted or not, the synchronization byte 501 shown in FIG. 4 is usually fixed data. In 2b, the synchronization byte is detected, and if it is detected, the data decoding circuit 116 shown in FIG. 2 is input. Switch to the function to pass the bucket data input without doing anything, and if it cannot be detected, switch the data decryption circuit 116 in FIG. 2 to the operation of the decryption function and change the key in the additional information area. By performing an operation to detect information, it is possible to detect even a tape in which tracks recorded with encrypted packet data and tracks recorded without encryption are mixed during recording. .

In addition, soft tapes that have been recorded in advance can be created and played back in the manner described above, and the bucket data on the tape can be protected.

The above shows an example in which the current block key is stored in the recording track, but the operation of the data key must be performed within one operation cycle of C2. If the calculation of the data key cannot be completed in one operation cycle of C2, as described above, by recording the current block key and the next block key in the recording track, The following data key can be obtained in advance. FIG. 24 is another configuration diagram of the digital signal recording / reproducing apparatus 200 of FIG. In the figure, reference numeral 121 denotes a digital interface circuit for realizing a protocol such as a high-speed digital bus interface such as IEEE 1394, and the time interval between input bucket data. 122 has a function of transmitting data at a high speed while maintaining a high speed. Numeral 123 denotes an encryption / decryption circuit for protecting digital data transmitted on the digital interface 122, which encrypts the bucket data and transmits it on the digital interface bus 122. Or decrypt the received digital data. Reference numeral 124 denotes a control circuit such as a microprocessor, which controls the digital interface circuit 121 and the encryption / decryption circuit 123. At the time of recording, the data is transmitted on the digital interface bus 122. The received digital data is subjected to a predetermined packet processing in the digital interface circuit 121, and is decrypted to the original bucket data in the encryption / decryption circuit 123. Output to circuit 107. Thereafter, as described above, the packet data is encrypted by the data encryption circuit 115 and recorded on the tape 111. At the time of reproduction, the reproduced packet data is decrypted in the data decryption circuit 116, output from the input / output circuit 107 to the encryption decryption circuit 123, and transmitted to the encryption Z decryption circuit 123. Then, the data is encrypted and output to the digital interface bus 122 via the digital interface circuit 121. According to this, protection of both the packet data on the tape and the packet data on the digital interface bus can be realized.

In the above embodiment, the recording and reproduction on a tape has been described. However, the same applies to the case of recording and reproduction on any other recording medium such as a disk such as an optical disk or a magnetic disk, and a semiconductor memory. Can be. In the case of the above-mentioned disc, switching of key information or switching of encryption or non-encryption may be performed at a section break, which is one-third unit of recording on the disc, for example.

Further, in the case of the semiconductor memory, the switching of the key information or the switching between the encryption and non-encryption may be performed, for example, at a boundary of an address which is one unit of recording in the semiconductor memory.

In the present embodiment, the present invention is applied to a system for encrypting a digital signal with a key. However, the present invention is not limited to this embodiment, and can be applied to, for example, a system in which a digital signal is scrambled by a key code. That is, the present invention is at least applicable to any system in which a digital signal is processed so as to be converted from its original clear state. Industrial applicability

According to the present invention, in a digital signal recording device, a reproducing device, and a recording medium for recording or reproducing a digital signal on or from a recording medium, at the time of recording, a key obtained by performing a predetermined operation on key information is recorded. Then, the digital signal is encrypted and recorded on a recording medium together with the key information. At the time of reproduction, the digital signal is reproduced using a key obtained by performing the predetermined operation on the key information reproduced from the recording medium. The digital signal is decoded and output. As described above, at the time of reproduction, the key cannot be obtained unless the predetermined operation is performed. Therefore, even if the key information on the recording medium is obtained, the digital signal encrypted using the key information is obtained. It is difficult to decrypt, and the copyright of the digital signal on the recording medium can be protected.

Claims

The scope of the claims

1. In a digital signal recording device that records digital signals on a recording medium,

Key information generating means for generating at least one key information;

Key generation means for receiving the key information and performing a predetermined operation to generate a key;

An encryption conversion unit that receives the key and the digital signal, encrypts the digital signal with the key, and outputs the encrypted digital signal;

Recording means for recording at least one piece of the key information together with the encrypted digital signal in a predetermined area on the recording medium.

A digital signal recording device, comprising:

2. The digital signal recording apparatus according to claim 1, wherein the digital signal has a bucket format of a predetermined length.

3. The key information generating means has a function of updating at least one of the key information at predetermined time intervals,

The recording means has a function of recording information capable of identifying a timing at which the key information generating means updates the key information in a predetermined area on the recording medium. The digital signal recording device according to item 1.

4. The digital signal has a bucket format of a predetermined length, and the recording means transmits the information which can identify the timing at which the key information generating means updates the key information to the digital signal. 4. The digital signal recording apparatus according to claim 3, further comprising a function of adding the signal to each bucket and recording the packet on the recording medium.

5. The encryption conversion means further encrypts and outputs the digital signal. And a function to select the output function without encryption

The recording means has a function of recording encryption flag information indicating whether or not the digital signal is encrypted in a predetermined area on the recording medium, and not recording the key information when not encrypting. The digital signal recording device according to claim 1, wherein:

6. The digital signal has a bucket format of a predetermined length, and the recording means stores encryption flag information indicating whether or not the digital signal is encrypted, in each bucket of the digital signal. 6. The digital signal recording device according to claim 5, further comprising a function of recording the data on the recording medium in addition to a unit.

7. Input a digital signal of a predetermined length in packet format, divide it into another predetermined length, and add a sync signal, recording information signal, additional information signal, and first error correction code to block format. A predetermined number of blocks are regarded as one track, a second error correction code is added in units of n (n is an integer equal to or greater than 1) tracks, and the second error correction code is also divided. In a digital signal recording device for recording the track on a recording medium by adding an error correction code of 1 to a block format,

Key information generating means for generating at least one key information;

A digital signal recording device, comprising:

8. The claim according to claim 7, wherein said recording means has a function of storing the key information in an additional information signal area of the block and recording the key information on the recording medium. Signal recording device.

9. The key information generation means has a function of updating at least one of the key information at predetermined time intervals,

8. The recording apparatus according to claim 7, wherein the recording unit records information capable of identifying a timing at which the key information generating unit updates the key information in a predetermined area on the recording medium. Digital signal recording device.

10. The recording means has a function of storing information capable of identifying the timing in a recording information signal area of the block and recording the information on the recording medium. A digital signal recording apparatus according to claim 9, wherein:

11. The recording means has a function of storing information capable of identifying the timing in an additional information signal area of the block and recording the information on the recording medium. A digital signal recording apparatus according to claim 9, wherein:

12. The recording means has a function of adding information capable of identifying the timing to each packet of the digital signal and recording the information on the recording medium. The digital signal recording device according to claim 9.

13. The key information generating means has a function of updating the key information at a break of a unit of n tracks to which the second error correction code is added. The digital signal recording device according to claim 9, wherein:

14. The cipher conversion means has a function of selecting between a function of encrypting and outputting the digital signal and a function of outputting the digital signal without encryption.

The recording means has a function of recording encryption flag information indicating whether or not the digital signal is encrypted in a predetermined area on the recording medium, and not recording the key information when not encrypting. Characterized by the claim Digital signal recording device according to range 7,

15. The recording apparatus according to claim 14, wherein said recording means has a function of storing said encryption flag information in a recording information signal area of said block and storing it on said recording medium. Digital signal recording device.

16. The recording apparatus according to claim 14, wherein said recording means has a function of storing said encryption flag information in an additional information signal area of said block and storing it on said recording medium. Digital signal recording device as described.

17. The digital signal recording apparatus according to claim 14, wherein said recording means has a function of adding said encryption flag information to each packet of said digital signal.

18. The cipher conversion means has a function of switching whether or not to encrypt the digital signal at a break in units of n tracks to which the second error correction code has been added. 15. The digital signal recording device according to claim 14, wherein:

1 9. In a digital signal reproducing device for reproducing digital signals recorded on a recording medium,

Reproducing means for reproducing at least one piece of key information recorded in a predetermined area on the recording medium and the digital signal;

Decryption conversion means for receiving the key and the reproduced digital signal, decrypting the digital signal with the key, and outputting the decrypted digital signal;

A digital signal reproducing device comprising:

20. The digital signal reproducing apparatus according to claim 19, wherein said digital signal has a bucket format of a predetermined length.

2 1. A key information generating means for generating at least one other key information, 10. The key generating unit according to claim 19, wherein the key generating unit has a function of generating a key by performing a predetermined operation when the key information and the other key information are input. Digital signal reproduction device.

22. The reproducing means reproduces the updated key information, which is recorded in a predetermined area on the recording medium, and information capable of identifying a timing for updating the key information. With the ability to

The key generation means has a function of receiving at least the updated key information and performing a predetermined operation to generate an updated key.

20. The digital camera according to claim 19, wherein said decryption / conversion means includes means for switching said input key to said updated key in accordance with said timing signal. Signal playback device.

23. The digital signal has a bucket format of a predetermined length, and the reproducing means is configured to add the digital signal to each bucket and record the digital image. 22. The digital signal reproducing apparatus according to claim 22, wherein the digital signal reproducing apparatus has a function of reproducing information capable of identifying a signal.

24. The playback means has a function of playing back encryption flag information, which is recorded in a predetermined area on the recording medium and indicates whether or not the digital signal is encrypted,

The decryption / conversion means has a function of selecting and switching between a function of decrypting and outputting the reproduced digital signal based on the encryption flag information and a function of outputting the digital signal without decryption. The digital signal reproduction device according to claim 19, wherein the digital signal reproduction device is characterized in that:

25. The digital signal has a bucket format of a predetermined length, and the reproducing means converts the digital signal, which is added to each bucket of the digital signal and recorded, to the digital signal. Indicates whether it is encrypted 25. The digital signal reproducing device according to claim 24, further comprising a function of reproducing encrypted flag information.

26. Divide a digital signal of a predetermined length packet format into another predetermined length, add a synchronization signal, a recording information signal, an additional information signal, and a first error correction code to form a block format, and N blocks (n is an integer equal to or greater than 1), add the second error correction code in track units, and divide the second error correction code described above into the first error correction code. A digital signal reproducing apparatus for reproducing the digital signal recorded on a recording medium by adding

A digital signal reproducing device comprising:

27. A key information generating means for generating at least one other key information, wherein the key information means receives the key information and the other key information and performs a predetermined operation. 27. The digital signal reproducing device according to claim 26, further comprising a key generating function.

28. The reproducing device according to claim 26, wherein the reproducing means has a function of reproducing the key information recorded in the additional information signal area of the block on the recording medium. Digital signal reproduction device according to the item.

29. The reproducing means reproduces the updated key information, which is recorded in a predetermined area on the recording medium, and information capable of identifying a timing for updating the key information. With the ability to The key generation means has a function of receiving at least the updated key information and performing a predetermined operation to generate an updated key.

27. The digital scope according to claim 26, wherein said decryption conversion means includes means for switching the input key to the updated key in accordance with the timing signal. Signal playback device.

30. The reproduction apparatus according to claim 2, wherein the reproduction means has a function of reproducing information which can be identified at the timing, which is recorded in a recording information signal area of the block. The digital signal reproducing device described in item 9.

31. The reproduction means has a function of reproducing information which is recorded in an additional information signal area of the block and which can identify the timing. Item 29. The digital signal reproducing device according to item 29.

32. The playback means has a function of playing back information that can be identified at the timing, which is added to and recorded in each packet of the digital signal. A digital signal reproducing apparatus according to claim 29.

33. The reproducing means has a function of reproducing the key information which has been updated at the unit of n tracks to which the second error correction code has been added. The digital signal reproducing apparatus according to claim 29, wherein

34. The playback means has a function of playing back encryption flag information, which is recorded in a predetermined area on the recording medium and indicates whether or not the digital signal is encrypted,

The decryption / conversion means decrypts and outputs the reproduced digital signal based on the encryption flag information, and outputs the digital signal without decryption. 27. The digital signal reproducing apparatus according to claim 26, further comprising a function of selecting and switching a function to be input.

35. The reproduction means has a function of reproducing encryption flag information, which is recorded in a recording information signal area of the block and indicates whether or not the digital signal is encrypted. The digital signal reproduction device according to claim 34, wherein:

36. The reproduction means has a function of reproducing encryption flag information, which is recorded in an additional information signal area of the block and indicates whether or not the digital signal is encrypted. The digital signal reproduction device according to claim 34, wherein the digital signal reproduction device is characterized in that:

37. The playback means has a function of playing back encryption flag information, which is recorded in addition to each packet of the digital signal and indicates whether or not the digital signal is encrypted. The digital signal reproducing device according to claim 34, wherein the digital signal reproducing device is provided.

38. The reproduction means has a function of reproducing the encryption flag, which is switched at a break of a unit of n tracks to which the second error correction code is added. The digital signal reproducing device according to claim 34, wherein the digital signal reproducing device is characterized in that:

3 9. On a digital signal recording medium on which digital signals are recorded,

A digital signal recording medium, wherein the key information is recorded in a predetermined area together with the digital signal encrypted with a key obtained by performing a predetermined operation on the key information.

40. The digital signal recording medium according to claim 39, wherein said digital signal has a bucket format of a predetermined length.

4 1. The key information is updated at a predetermined interval and recorded in a predetermined area The digital signal recording medium according to claim 39, wherein:

42. The digital camera according to claim 39, wherein information capable of identifying timing indicating that said key information has been updated at predetermined intervals is recorded in a predetermined area. Digital signal recording medium.

4 3. If encryption flag information indicating whether or not the digital signal is encrypted is recorded in a predetermined area, and the digital signal is not encrypted, the key information is recorded. The digital signal recording medium according to claim 39, wherein the digital signal recording medium is not recorded.

4 4. Key generation means for generating a plurality of types of keys for converting a digital signal,

Conversion means for converting a digital signal using the key and outputting a converted digital signal after the conversion;

Recording means for recording the key and the converted digital signal on a recording medium;

A digital signal recording device comprising:

4 5. A converted digital signal converted with a plurality of types of keys and a medium on which the keys are recorded are used.

Reproducing means for reproducing and outputting the converted digital signal and the key from the medium;

Decryption conversion means to which an output from the reproduction means is input and which decrypts and converts the converted digital signal using the key;

Digital signal reproducing device equipped with

4 6. A converted digital signal converted by a plurality of types of keys and a recording medium on which the keys are recorded.